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SparcV9 doesnt have rem instruction either.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193789 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Roman Divacky
2013-10-31 19:22:33 +00:00
parent 844e7d35d4
commit 1d6d49fbb1
2 changed files with 31 additions and 0 deletions
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8
lib/Target/Sparc/SparcISelLowering.cpp
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@ -1341,6 +1341,14 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::SREM, MVT::i32, Expand);
setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
// ... nor does SparcV9.
if (Subtarget->is64Bit()) {
setOperationAction(ISD::UREM, MVT::i64, Expand);
setOperationAction(ISD::SREM, MVT::i64, Expand);
setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
setOperationAction(ISD::UDIVREM, MVT::i64, Expand);
}
// Custom expand fp<->sint
setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);