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Update and_ops.ll according to the recent dagcombiner changes.
Add a new test, and_ops_more.ll, which is XFAIL'd, to record the parts of and_ops.ll that were affected by this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50379 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,7 +1,7 @@
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; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep and %t1.s | count 232
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; RUN: grep and %t1.s | count 234
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; RUN: grep andc %t1.s | count 85
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; RUN: grep andi %t1.s | count 36
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; RUN: grep andi %t1.s | count 37
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; RUN: grep andhi %t1.s | count 30
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; RUN: grep andbi %t1.s | count 4
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26
test/CodeGen/CellSPU/and_ops_more.ll
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26
test/CodeGen/CellSPU/and_ops_more.ll
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@ -0,0 +1,26 @@
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; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep and %t1.s | count 10
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; RUN: not grep andc %t1.s
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; RUN: not grep andi %t1.s
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; RUN: grep andhi %t1.s | count 5
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; RUN: grep andbi %t1.s | count 1
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; XFAIL: *
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; This testcase is derived from test/CodeGen/CellSPU/and_ops.ll and
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; records the changes due to r50358. The and_sext8 function appears
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; to be improved by this change, while the andhi_i16 function appears
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; to be pessimized.
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define i16 @andhi_i16(i16 signext %in) signext {
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%tmp38 = and i16 %in, 37 ; <i16> [#uses=1]
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ret i16 %tmp38
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}
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define i8 @and_sext8(i8 signext %in) signext {
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; ANDBI generated
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%tmp38 = and i8 %in, 37
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ret i8 %tmp38
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}
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