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Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2010-07-10 22:42:59 +00:00
parent c0075cce7c
commit 1e1098c6f3
7 changed files with 62 additions and 98 deletions
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9
lib/CodeGen/MachineRegisterInfo.cpp
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@@ -194,12 +194,9 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
--i; --e; --i; --e;
} else { } else {
// Emit a copy. // Emit a copy.
const TargetRegisterClass *RC = getRegClass(LiveIns[i].second); BuildMI(*EntryMBB, EntryMBB->begin(), DebugLoc(),
bool Emitted = TII.copyRegToReg(*EntryMBB, EntryMBB->begin(), TII.get(TargetOpcode::COPY), LiveIns[i].second)
LiveIns[i].second, LiveIns[i].first, .addReg(LiveIns[i].first);
RC, RC, DebugLoc());
assert(Emitted && "Unable to issue a live-in copy instruction!\n");
(void) Emitted;
// Add the register to the entry block live-in set. // Add the register to the entry block live-in set.
EntryMBB->addLiveIn(LiveIns[i].first); EntryMBB->addLiveIn(LiveIns[i].first);

32
lib/CodeGen/Spiller.cpp
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@@ -14,6 +14,7 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetInstrInfo.h"
@@ -337,10 +338,9 @@ private:
// Insert a copy at the start of the MBB. The range proceeding the // Insert a copy at the start of the MBB. The range proceeding the
// copy will be attached to the original LiveInterval. // copy will be attached to the original LiveInterval.
MachineBasicBlock *defMBB = lis->getMBBFromIndex(newVNI->def); MachineBasicBlock *defMBB = lis->getMBBFromIndex(newVNI->def);
tii->copyRegToReg(*defMBB, defMBB->begin(), newVReg, li->reg, trc, trc, MachineInstr *copyMI = BuildMI(*defMBB, defMBB->begin(), DebugLoc(),
DebugLoc()); tii->get(TargetOpcode::COPY), newVReg)
MachineInstr *copyMI = defMBB->begin(); .addReg(li->reg, RegState::Kill);
copyMI->addRegisterKilled(li->reg, tri);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI); SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
VNInfo *phiDefVNI = li->getNextValue(lis->getMBBStartIdx(defMBB), VNInfo *phiDefVNI = li->getNextValue(lis->getMBBStartIdx(defMBB),
0, false, lis->getVNInfoAllocator()); 0, false, lis->getVNInfoAllocator());
@@ -390,11 +390,10 @@ private:
if (isTwoAddr && !twoAddrUseIsUndef) { if (isTwoAddr && !twoAddrUseIsUndef) {
MachineBasicBlock *defMBB = defInst->getParent(); MachineBasicBlock *defMBB = defInst->getParent();
tii->copyRegToReg(*defMBB, defInst, newVReg, li->reg, trc, trc, MachineInstr *copyMI = BuildMI(*defMBB, defInst, DebugLoc(),
DebugLoc()); tii->get(TargetOpcode::COPY), newVReg)
MachineInstr *copyMI = prior(MachineBasicBlock::iterator(defInst)); .addReg(li->reg, RegState::Kill);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI); SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
copyMI->addRegisterKilled(li->reg, tri);
LiveRange *origUseRange = LiveRange *origUseRange =
li->getLiveRangeContaining(newVNI->def.getUseIndex()); li->getLiveRangeContaining(newVNI->def.getUseIndex());
origUseRange->end = copyIdx.getDefIndex(); origUseRange->end = copyIdx.getDefIndex();
@@ -440,10 +439,9 @@ private:
// reg. // reg.
MachineBasicBlock *useMBB = useInst->getParent(); MachineBasicBlock *useMBB = useInst->getParent();
MachineBasicBlock::iterator useItr(useInst); MachineBasicBlock::iterator useItr(useInst);
tii->copyRegToReg(*useMBB, llvm::next(useItr), li->reg, newVReg, trc, MachineInstr *copyMI = BuildMI(*useMBB, llvm::next(useItr), DebugLoc(),
trc, DebugLoc()); tii->get(TargetOpcode::COPY), newVReg)
MachineInstr *copyMI = llvm::next(useItr); .addReg(li->reg, RegState::Kill);
copyMI->addRegisterKilled(newVReg, tri);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI); SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
// Change the old two-address defined range & vni to start at // Change the old two-address defined range & vni to start at
@@ -471,12 +469,10 @@ private:
continue; continue;
SlotIndex killIdx = LRI->end; SlotIndex killIdx = LRI->end;
MachineBasicBlock *killMBB = lis->getMBBFromIndex(killIdx); MachineBasicBlock *killMBB = lis->getMBBFromIndex(killIdx);
MachineInstr *copyMI = BuildMI(*killMBB, killMBB->getFirstTerminator(),
tii->copyRegToReg(*killMBB, killMBB->getFirstTerminator(), DebugLoc(), tii->get(TargetOpcode::COPY),
li->reg, newVReg, trc, trc, li->reg)
DebugLoc()); .addReg(newVReg, RegState::Kill);
MachineInstr *copyMI = prior(killMBB->getFirstTerminator());
copyMI->addRegisterKilled(newVReg, tri);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI); SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);
// Save the current end. We may need it to add a new range if the // Save the current end. We may need it to add a new range if the

9
lib/CodeGen/StackSlotColoring.cpp
View File

@@ -19,6 +19,7 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveStackAnalysis.h" #include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -609,8 +610,8 @@ StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
DEBUG(MI->dump()); DEBUG(MI->dump());
++NumLoadElim; ++NumLoadElim;
} else { } else {
TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC, BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(TargetOpcode::COPY),
MI->getDebugLoc()); DstReg).addReg(Reg);
++NumRegRepl; ++NumRegRepl;
} }
@@ -626,8 +627,8 @@ StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
DEBUG(MI->dump()); DEBUG(MI->dump());
++NumStoreElim; ++NumStoreElim;
} else { } else {
TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC, BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(TargetOpcode::COPY), Reg)
MI->getDebugLoc()); .addReg(SrcReg);
++NumRegRepl; ++NumRegRepl;
} }

19
lib/CodeGen/StrongPHIElimination.cpp
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@@ -25,6 +25,7 @@
#include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterCoalescer.h" #include "llvm/CodeGen/RegisterCoalescer.h"
@@ -695,9 +696,8 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
// Insert copy from curr.second to a temporary at // Insert copy from curr.second to a temporary at
// the Phi defining curr.second // the Phi defining curr.second
MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second); MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second);
TII->copyRegToReg(*PI->getParent(), PI, t, BuildMI(*PI->getParent(), PI, DebugLoc(), TII->get(TargetOpcode::COPY),
curr.second, RC, RC, DebugLoc()); t).addReg(curr.second);
DEBUG(dbgs() << "Inserted copy from " << curr.second << " to " << t DEBUG(dbgs() << "Inserted copy from " << curr.second << " to " << t
<< "\n"); << "\n");
@@ -712,8 +712,8 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
} }
// Insert copy from map[curr.first] to curr.second // Insert copy from map[curr.first] to curr.second
TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), curr.second, BuildMI(*MBB, MBB->getFirstTerminator(), DebugLoc(),
map[curr.first], RC, RC, DebugLoc()); TII->get(TargetOpcode::COPY), curr.second).addReg(map[curr.first]);
map[curr.first] = curr.second; map[curr.first] = curr.second;
DEBUG(dbgs() << "Inserted copy from " << curr.first << " to " DEBUG(dbgs() << "Inserted copy from " << curr.first << " to "
<< curr.second << "\n"); << curr.second << "\n");
@@ -761,8 +761,8 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
// Insert a copy from dest to a new temporary t at the end of b // Insert a copy from dest to a new temporary t at the end of b
unsigned t = MF->getRegInfo().createVirtualRegister(RC); unsigned t = MF->getRegInfo().createVirtualRegister(RC);
TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), t, BuildMI(*MBB, MBB->getFirstTerminator(), DebugLoc(),
curr.second, RC, RC, DebugLoc()); TII->get(TargetOpcode::COPY), t).addReg(curr.second);
map[curr.second] = t; map[curr.second] = t;
MachineBasicBlock::iterator TI = MBB->getFirstTerminator(); MachineBasicBlock::iterator TI = MBB->getFirstTerminator();
@@ -956,9 +956,8 @@ bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) {
} else { } else {
// Insert a last-minute copy if a conflict was detected. // Insert a last-minute copy if a conflict was detected.
const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo(); const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo();
const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(I->first); BuildMI(*SI->second, SI->second->getFirstTerminator(), DebugLoc(),
TII->copyRegToReg(*SI->second, SI->second->getFirstTerminator(), TII->get(TargetOpcode::COPY), I->first).addReg(SI->first);
I->first, SI->first, RC, RC, DebugLoc());
LI.renumber(); LI.renumber();

18
lib/CodeGen/TailDuplication.cpp
View File

@@ -17,6 +17,7 @@
#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineSSAUpdater.h" #include "llvm/CodeGen/MachineSSAUpdater.h"
#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetInstrInfo.h"
@@ -559,11 +560,9 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
} }
MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator(); MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) { for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first); Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
TII->copyRegToReg(*PredBB, Loc, CopyInfos[i].first, TII->get(TargetOpcode::COPY),
CopyInfos[i].second, RC,RC, DebugLoc()); CopyInfos[i].first).addReg(CopyInfos[i].second));
MachineInstr *CopyMI = prior(Loc);
Copies.push_back(CopyMI);
} }
NumInstrDups += TailBB->size() - 1; // subtract one for removed branch NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
@@ -618,11 +617,10 @@ TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
} }
MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator(); MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) { for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first); Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
TII->copyRegToReg(*PrevBB, Loc, CopyInfos[i].first, TII->get(TargetOpcode::COPY),
CopyInfos[i].second, RC, RC, DebugLoc()); CopyInfos[i].first)
MachineInstr *CopyMI = prior(Loc); .addReg(CopyInfos[i].second));
Copies.push_back(CopyMI);
} }
} else { } else {
// No PHIs to worry about, just splice the instructions over. // No PHIs to worry about, just splice the instructions over.

32
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@@ -1437,10 +1437,9 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
if (DefMI->isCopy() && DefMI->getOperand(1).getSubReg()) if (DefMI->isCopy() && DefMI->getOperand(1).getSubReg())
RealSrcs.push_back(DefMI->getOperand(1).getReg()); RealSrcs.push_back(DefMI->getOperand(1).getReg());
if (!Seen.insert(SrcReg) || bool isKill = MI->getOperand(i).isKill();
MI->getParent() != DefMI->getParent() || if (!Seen.insert(SrcReg) || MI->getParent() != DefMI->getParent() ||
!MI->getOperand(i).isKill() || !isKill || HasOtherRegSequenceUses(SrcReg, MI, MRI)) {
HasOtherRegSequenceUses(SrcReg, MI, MRI)) {
// REG_SEQUENCE cannot have duplicated operands, add a copy. // REG_SEQUENCE cannot have duplicated operands, add a copy.
// Also add an copy if the source is live-in the block. We don't want // Also add an copy if the source is live-in the block. We don't want
// to end up with a partial-redef of a livein, e.g. // to end up with a partial-redef of a livein, e.g.
@@ -1456,28 +1455,21 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
// If the REG_SEQUENCE doesn't kill its source, keeping live variables // If the REG_SEQUENCE doesn't kill its source, keeping live variables
// correctly up to date becomes very difficult. Insert a copy. // correctly up to date becomes very difficult. Insert a copy.
// //
const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
unsigned NewReg = MRI->createVirtualRegister(RC);
MachineBasicBlock::iterator InsertLoc = MI; MachineBasicBlock::iterator InsertLoc = MI;
bool Emitted = MachineInstr *CopyMI = BuildMI(*MI->getParent(), InsertLoc,
TII->copyRegToReg(*MI->getParent(), InsertLoc, NewReg, SrcReg, RC, RC, MI->getDebugLoc(), TII->get(TargetOpcode::COPY))
MI->getDebugLoc()); .addReg(DstReg, RegState::Define, MI->getOperand(i+1).getImm())
(void)Emitted; .addReg(SrcReg, getKillRegState(isKill));
assert(Emitted && "Unable to issue a copy instruction!\n"); MI->getOperand(i).setReg(0);
MI->getOperand(i).setReg(NewReg); if (LV && isKill)
if (MI->getOperand(i).isKill()) { LV->replaceKillInstruction(SrcReg, MI, CopyMI);
MachineBasicBlock::iterator CopyMI = prior(InsertLoc); DEBUG(dbgs() << "Inserted: " << *CopyMI);
MachineOperand *KillMO = CopyMI->findRegisterUseOperand(SrcReg);
KillMO->setIsKill();
if (LV)
// Update live variables
LV->replaceKillInstruction(SrcReg, MI, &*CopyMI);
}
} }
} }
for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) { for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
unsigned SrcReg = MI->getOperand(i).getReg(); unsigned SrcReg = MI->getOperand(i).getReg();
if (!SrcReg) continue;
unsigned SubIdx = MI->getOperand(i+1).getImm(); unsigned SubIdx = MI->getOperand(i+1).getImm();
UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI, *TRI); UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI, *TRI);
} }

41
lib/CodeGen/VirtRegRewriter.cpp
View File

@@ -1758,7 +1758,6 @@ bool LocalRewriter::InsertRestores(MachineInstr *MI,
bool DoReMat = VRM->isReMaterialized(VirtReg); bool DoReMat = VRM->isReMaterialized(VirtReg);
int SSorRMId = DoReMat int SSorRMId = DoReMat
? VRM->getReMatId(VirtReg) : VRM->getStackSlot(VirtReg); ? VRM->getReMatId(VirtReg) : VRM->getStackSlot(VirtReg);
const TargetRegisterClass* RC = MRI->getRegClass(VirtReg);
unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId); unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
if (InReg == Phys) { if (InReg == Phys) {
// If the value is already available in the expected register, save // If the value is already available in the expected register, save
@@ -1792,20 +1791,16 @@ bool LocalRewriter::InsertRestores(MachineInstr *MI,
MachineBasicBlock::iterator InsertLoc = MachineBasicBlock::iterator InsertLoc =
ComputeReloadLoc(MII, MBB->begin(), Phys, TRI, DoReMat, SSorRMId, TII, ComputeReloadLoc(MII, MBB->begin(), Phys, TRI, DoReMat, SSorRMId, TII,
*MBB->getParent()); *MBB->getParent());
MachineInstr *CopyMI = BuildMI(*MBB, InsertLoc, MI->getDebugLoc(),
TII->copyRegToReg(*MBB, InsertLoc, Phys, InReg, RC, RC, TII->get(TargetOpcode::COPY), Phys)
MI->getDebugLoc()); .addReg(InReg, RegState::Kill);
// This invalidates Phys. // This invalidates Phys.
Spills.ClobberPhysReg(Phys); Spills.ClobberPhysReg(Phys);
// Remember it's available. // Remember it's available.
Spills.addAvailable(SSorRMId, Phys); Spills.addAvailable(SSorRMId, Phys);
// Mark is killed.
MachineInstr *CopyMI = prior(InsertLoc);
CopyMI->setAsmPrinterFlag(MachineInstr::ReloadReuse); CopyMI->setAsmPrinterFlag(MachineInstr::ReloadReuse);
MachineOperand *KillOpnd = CopyMI->findRegisterUseOperand(InReg);
KillOpnd->setIsKill();
UpdateKills(*CopyMI, TRI, RegKills, KillOps); UpdateKills(*CopyMI, TRI, RegKills, KillOps);
DEBUG(dbgs() << '\t' << *CopyMI); DEBUG(dbgs() << '\t' << *CopyMI);
@@ -2149,7 +2144,6 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
continue; continue;
} }
const TargetRegisterClass* RC = MRI->getRegClass(VirtReg);
MRI->setPhysRegUsed(DesignatedReg); MRI->setPhysRegUsed(DesignatedReg);
ReusedOperands.markClobbered(DesignatedReg); ReusedOperands.markClobbered(DesignatedReg);
@@ -2157,11 +2151,9 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
MachineBasicBlock::iterator InsertLoc = MachineBasicBlock::iterator InsertLoc =
ComputeReloadLoc(&MI, MBB->begin(), PhysReg, TRI, DoReMat, ComputeReloadLoc(&MI, MBB->begin(), PhysReg, TRI, DoReMat,
SSorRMId, TII, MF); SSorRMId, TII, MF);
MachineInstr *CopyMI = BuildMI(*MBB, InsertLoc, MI.getDebugLoc(),
TII->copyRegToReg(*MBB, InsertLoc, DesignatedReg, PhysReg, RC, RC, TII->get(TargetOpcode::COPY),
MI.getDebugLoc()); DesignatedReg).addReg(PhysReg);
MachineInstr *CopyMI = prior(InsertLoc);
CopyMI->setAsmPrinterFlag(MachineInstr::ReloadReuse); CopyMI->setAsmPrinterFlag(MachineInstr::ReloadReuse);
UpdateKills(*CopyMI, TRI, RegKills, KillOps); UpdateKills(*CopyMI, TRI, RegKills, KillOps);
@@ -2282,27 +2274,16 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) { if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
DEBUG(dbgs() << "Promoted Load To Copy: " << MI); DEBUG(dbgs() << "Promoted Load To Copy: " << MI);
if (DestReg != InReg) { if (DestReg != InReg) {
const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
TII->copyRegToReg(*MBB, &MI, DestReg, InReg, RC, RC,
MI.getDebugLoc());
MachineOperand *DefMO = MI.findRegisterDefOperand(DestReg); MachineOperand *DefMO = MI.findRegisterDefOperand(DestReg);
unsigned SubIdx = DefMO->getSubReg(); MachineInstr *CopyMI = BuildMI(*MBB, &MI, MI.getDebugLoc(),
TII->get(TargetOpcode::COPY))
.addReg(DestReg, RegState::Define, DefMO->getSubReg())
.addReg(InReg, RegState::Kill);
// Revisit the copy so we make sure to notice the effects of the // Revisit the copy so we make sure to notice the effects of the
// operation on the destreg (either needing to RA it if it's // operation on the destreg (either needing to RA it if it's
// virtual or needing to clobber any values if it's physical). // virtual or needing to clobber any values if it's physical).
NextMII = &MI; NextMII = CopyMI;
--NextMII; // backtrack to the copy.
NextMII->setAsmPrinterFlag(MachineInstr::ReloadReuse); NextMII->setAsmPrinterFlag(MachineInstr::ReloadReuse);
// Propagate the sub-register index over.
if (SubIdx) {
DefMO = NextMII->findRegisterDefOperand(DestReg);
DefMO->setSubReg(SubIdx);
}
// Mark is killed.
MachineOperand *KillOpnd = NextMII->findRegisterUseOperand(InReg);
KillOpnd->setIsKill();
BackTracked = true; BackTracked = true;
} else { } else {
DEBUG(dbgs() << "Removing now-noop copy: " << MI); DEBUG(dbgs() << "Removing now-noop copy: " << MI);