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Fix an inconsistency in the x86 backend that led it to reject "calll foo" on

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x86-32: 32-bit calls were named "call" not "calll".  64-bit calls were correctly
named "callq", so this only impacted x86-32.

This fixes rdar://8456370 - llvm-mc rejects 'calll'

This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-09-22 05:49:14 +00:00
parent bc57c6db4a
commit 1eb1b68e3a
22 changed files with 370 additions and 358 deletions
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8
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -1020,6 +1020,14 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
NameLoc);
}
// call foo is not ambiguous with callw.
if (Name == "call" && Operands.size() == 2) {
const char *NewName = Is64Bit ? "callq" : "calll";
delete Operands[0];
Operands[0] = X86Operand::CreateToken(NewName, NameLoc);
Name = NewName;
}
// movsd -> movsl (when no operands are specified).
if (Name == "movsd" && Operands.size() == 1) {
delete Operands[0];

4
lib/Target/X86/X86Instr64bit.td
View File

@ -148,10 +148,10 @@ let isCall = 1 in
Requires<[In64BitMode, NotWin64]>;
def CALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops),
"call{q}\t{*}$dst", [(X86call GR64:$dst)]>,
Requires<[NotWin64]>;
Requires<[In64BitMode, NotWin64]>;
def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops),
"call{q}\t{*}$dst", [(X86call (loadi64 addr:$dst))]>,
Requires<[NotWin64]>;
Requires<[In64BitMode, NotWin64]>;
def FARCALL64 : RI<0xFF, MRM3m, (outs), (ins opaque80mem:$dst),
"lcall{q}\t{*}$dst", []>;

8
lib/Target/X86/X86InstrInfo.td
View File

@ -690,11 +690,13 @@ let isCall = 1 in
Uses = [ESP] in {
def CALLpcrel32 : Ii32PCRel<0xE8, RawFrm,
(outs), (ins i32imm_pcrel:$dst,variable_ops),
"call\t$dst", []>;
"call{l}\t$dst", []>, Requires<[In32BitMode]>;
def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
"call\t{*}$dst", [(X86call GR32:$dst)]>;
"call{l}\t{*}$dst", [(X86call GR32:$dst)]>,
Requires<[In32BitMode]>;
def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
"call\t{*}$dst", [(X86call (loadi32 addr:$dst))]>;
"call{l}\t{*}$dst", [(X86call (loadi32 addr:$dst))]>,
Requires<[In32BitMode]>;
def FARCALL16i : Iseg16<0x9A, RawFrmImm16, (outs),
(ins i16imm:$off, i16imm:$seg),

2
test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll
View File

@ -11,7 +11,7 @@ target triple = "i386-apple-darwin10.0.0"
; Verify that %esi gets spilled before the call.
; CHECK: Z4test1SiS
; CHECK: movl %esi,{{.*}}(%ebp)
; CHECK: call __Z6throwsv
; CHECK: calll __Z6throwsv
define i8* @_Z4test1SiS_(%struct.S* byval %s1, i32 %n, %struct.S* byval %s2) ssp {
entry:

610
test/CodeGen/X86/abi-isel.ll
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File diff suppressed because it is too large Load Diff

2
test/CodeGen/X86/dll-linkage.ll
View File

@ -3,7 +3,7 @@
declare dllimport void @foo()
define void @bar() nounwind {
; CHECK: call *__imp__foo
; CHECK: calll *__imp__foo
call void @foo()
ret void
}

2
test/CodeGen/X86/dollar-name.ll
View File

@ -7,7 +7,7 @@
define i32 @"$foo"() nounwind {
; CHECK: movl ($bar),
; CHECK: addl ($qux),
; CHECK: call ($hen)
; CHECK: calll ($hen)
%m = load i32* @"$bar"
%n = load i32* @"$qux"
%t = add i32 %m, %n

4
test/CodeGen/X86/ghc-cc.ll
View File

@ -11,9 +11,9 @@ define void @zap(i32 %a, i32 %b) nounwind {
entry:
; CHECK: movl {{[0-9]*}}(%esp), %ebx
; CHECK-NEXT: movl {{[0-9]*}}(%esp), %ebp
; CHECK-NEXT: call addtwo
; CHECK-NEXT: calll addtwo
%0 = call cc 10 i32 @addtwo(i32 %a, i32 %b)
; CHECK: call foo
; CHECK: calll foo
call void @foo() nounwind
ret void
}

2
test/CodeGen/X86/memmove-0.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy}
; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {calll memcpy}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)

2
test/CodeGen/X86/memmove-1.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {calll memmove}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)

2
test/CodeGen/X86/memmove-3.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {calll memmove}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)

4
test/CodeGen/X86/memset-2.ll
View File

@ -5,7 +5,7 @@ declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
define fastcc void @t1() nounwind {
entry:
; CHECK: t1:
; CHECK: call _memset
; CHECK: calll _memset
call void @llvm.memset.i32( i8* null, i8 0, i32 188, i32 1 ) nounwind
unreachable
}
@ -13,7 +13,7 @@ entry:
define fastcc void @t2(i8 signext %c) nounwind {
entry:
; CHECK: t2:
; CHECK: call _memset
; CHECK: calll _memset
call void @llvm.memset.i32( i8* undef, i8 %c, i32 76, i32 1 ) nounwind
unreachable
}

4
test/CodeGen/X86/mingw-alloca.ll
View File

@ -6,7 +6,7 @@ target triple = "i386-pc-mingw32"
define void @foo1(i32 %N) nounwind {
entry:
; CHECK: _foo1:
; CHECK: call __alloca
; CHECK: calll __alloca
%tmp14 = alloca i32, i32 %N ; <i32*> [#uses=1]
call void @bar1( i32* %tmp14 )
ret void
@ -19,7 +19,7 @@ entry:
; CHECK: _foo2:
; CHECK: andl $-16, %esp
; CHECK: pushl %eax
; CHECK: call __alloca
; CHECK: calll __alloca
; CHECK: movl 8028(%esp), %eax
%A2 = alloca [2000 x i32], align 16 ; <[2000 x i32]*> [#uses=1]
%A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0 ; <i32*> [#uses=1]

2
test/CodeGen/X86/movgs.ll
View File

@ -27,7 +27,7 @@ entry:
; rdar://8453210
; X32: test2:
; X32: movl {{.*}}(%esp), %eax
; X32: call *%gs:(%eax)
; X32: calll *%gs:(%eax)
; X64: test2:
; X64: callq *%gs:(%rdi)

24
test/CodeGen/X86/pic.ll
View File

@ -12,7 +12,7 @@ entry:
ret void
; LINUX: test0:
; LINUX: call .L0$pb
; LINUX: calll .L0$pb
; LINUX-NEXT: .L0$pb:
; LINUX-NEXT: popl
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L0$pb),
@ -34,7 +34,7 @@ entry:
ret void
; LINUX: test1:
; LINUX: call .L1$pb
; LINUX: calll .L1$pb
; LINUX-NEXT: .L1$pb:
; LINUX-NEXT: popl
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), %eax
@ -54,12 +54,12 @@ entry:
; LINUX: test2:
; LINUX: pushl %ebx
; LINUX-NEXT: subl $8, %esp
; LINUX-NEXT: call .L2$pb
; LINUX-NEXT: calll .L2$pb
; LINUX-NEXT: .L2$pb:
; LINUX-NEXT: popl %ebx
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L2$pb), %ebx
; LINUX: movl $40, (%esp)
; LINUX: call malloc@PLT
; LINUX: calll malloc@PLT
; LINUX: addl $8, %esp
; LINUX: popl %ebx
; LINUX: ret
@ -75,13 +75,13 @@ entry:
call void(...)* %tmp1()
ret void
; LINUX: test3:
; LINUX: call .L3$pb
; LINUX: calll .L3$pb
; LINUX-NEXT: .L3$pb:
; LINUX: popl
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L3$pb), %[[REG3:e..]]
; LINUX: movl pfoo@GOT(%[[REG3]]),
; LINUX: call afoo@PLT
; LINUX: call *
; LINUX: calll afoo@PLT
; LINUX: calll *
}
declare void(...)* @afoo(...)
@ -91,10 +91,10 @@ entry:
call void(...)* @foo()
ret void
; LINUX: test4:
; LINUX: call .L4$pb
; LINUX: calll .L4$pb
; LINUX: popl %ebx
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L4$pb), %ebx
; LINUX: call foo@PLT
; LINUX: calll foo@PLT
}
declare void @foo(...)
@ -112,7 +112,7 @@ entry:
ret void
; LINUX: test5:
; LINUX: call .L5$pb
; LINUX: calll .L5$pb
; LINUX-NEXT: .L5$pb:
; LINUX-NEXT: popl %eax
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L5$pb), %eax
@ -134,7 +134,7 @@ entry:
; LINUX: .LCPI6_0:
; LINUX: test6:
; LINUX: call .L6$pb
; LINUX: calll .L6$pb
; LINUX: .L6$pb:
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L6$pb),
; LINUX: fldl .LCPI6_0@GOTOFF(
@ -186,7 +186,7 @@ bb12:
ret void
; LINUX: test7:
; LINUX: call .L7$pb
; LINUX: calll .L7$pb
; LINUX: .L7$pb:
; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L7$pb),
; LINUX: .LJTI7_0@GOTOFF(

2
test/CodeGen/X86/sibcall-3.ll
View File

@ -3,7 +3,7 @@
define void @t1(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind {
; CHECK: t1:
; CHECK: call 0
; CHECK: calll 0
tail call void null(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind
ret void
}

24
test/CodeGen/X86/sibcall.ll
View File

@ -45,7 +45,7 @@ declare i32 @foo3()
define void @t4(void (i32)* nocapture %x) nounwind ssp {
entry:
; 32: t4:
; 32: call *
; 32: calll *
; FIXME: gcc can generate a tailcall for this. But it's tricky.
; 64: t4:
@ -71,7 +71,7 @@ entry:
define i32 @t6(i32 %x) nounwind ssp {
entry:
; 32: t6:
; 32: call {{_?}}t6
; 32: calll {{_?}}t6
; 32: jmp {{_?}}bar
; 64: t6:
@ -108,7 +108,7 @@ declare i32 @bar2(i32, i32, i32)
define signext i16 @t8() nounwind ssp {
entry:
; 32: t8:
; 32: call {{_?}}bar3
; 32: calll {{_?}}bar3
; 64: t8:
; 64: callq {{_?}}bar3
@ -121,7 +121,7 @@ declare signext i16 @bar3()
define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp {
entry:
; 32: t9:
; 32: call *
; 32: calll *
; 64: t9:
; 64: callq *
@ -133,7 +133,7 @@ entry:
define void @t10() nounwind ssp {
entry:
; 32: t10:
; 32: call
; 32: calll
; 64: t10:
; 64: callq
@ -205,12 +205,12 @@ declare i32 @foo6(i32, i32, %struct.t* byval align 4)
define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp {
; 32: t13:
; 32-NOT: jmp
; 32: call
; 32: calll
; 32: ret
; 64: t13:
; 64-NOT: jmp
; 64: call
; 64: callq
; 64: ret
entry:
%0 = tail call fastcc %struct.ns* @foo7(%struct.cp* byval align 4 %yy, i8 signext 0) nounwind
@ -248,7 +248,7 @@ entry:
define void @t15(%struct.foo* noalias sret %agg.result) nounwind {
; 32: t15:
; 32: call {{_?}}f
; 32: calll {{_?}}f
; 32: ret $4
; 64: t15:
@ -263,7 +263,7 @@ declare void @f(%struct.foo* noalias sret) nounwind
define void @t16() nounwind ssp {
entry:
; 32: t16:
; 32: call {{_?}}bar4
; 32: calll {{_?}}bar4
; 32: fstp
; 64: t16:
@ -293,7 +293,7 @@ declare void @bar5(...)
define void @t18() nounwind ssp {
entry:
; 32: t18:
; 32: call {{_?}}bar6
; 32: calll {{_?}}bar6
; 32: fstp %st(0)
; 64: t18:
@ -309,7 +309,7 @@ define void @t19() alignstack(32) nounwind {
entry:
; CHECK: t19:
; CHECK: andl $-32
; CHECK: call {{_?}}foo
; CHECK: calll {{_?}}foo
tail call void @foo() nounwind
ret void
}
@ -323,7 +323,7 @@ declare void @foo()
define double @t20(double %x) nounwind {
entry:
; 32: t20:
; 32: call {{_?}}foo20
; 32: calll {{_?}}foo20
; 32: fldl (%esp)
; 64: t20:

2
test/CodeGen/X86/tailcall-stackalign.ll
View File

@ -19,5 +19,5 @@ define i32 @main(i32 %argc, i8** %argv) {
ret i32 0
}
; CHECK: call tailcaller
; CHECK: calll tailcaller
; CHECK-NEXT: subl $12

2
test/CodeGen/X86/unaligned-load.ll
View File

@ -13,7 +13,7 @@ entry:
bb:
%String2Loc9 = getelementptr inbounds [31 x i8]* %String2Loc, i64 0, i64 0
call void @llvm.memcpy.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1)
; I386: call {{_?}}memcpy
; I386: calll {{_?}}memcpy
; CORE2: movabsq
; CORE2: movabsq

8
test/CodeGen/X86/win_chkstk.ll
View File

@ -12,10 +12,10 @@
; Stack allocation >= 4096 bytes will require call to __chkstk in the Windows ABI.
define i32 @main4k() nounwind {
entry:
; WIN_X32: call __chkstk
; WIN_X32: calll __chkstk
; WIN_X64: call __chkstk
; MINGW_X32: call __alloca
; MINGW_X64: call _alloca
; MINGW_X32: calll __alloca
; MINGW_X64: calll _alloca
; LINUX-NOT: call __chkstk
%array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0]
ret i32 0
@ -26,7 +26,7 @@ entry:
define i32 @main128() nounwind {
entry:
; WIN_X32: # BB#0:
; WIN_X32-NOT: call __chkstk
; WIN_X32-NOT: calll __chkstk
; WIN_X32: ret
; WIN_X64: # BB#0:

4
test/MC/AsmParser/X86/x86_32-new-encoder.s
View File

@ -561,4 +561,6 @@ lcall $0x7ace,$0x7ace
jmp $0x7ace,$0x7ace
ljmp $0x7ace,$0x7ace
// rdar://8456370
// CHECK: calll a
calll a

6
test/MC/AsmParser/X86/x86_operands.s
View File

@ -46,11 +46,11 @@
addl $1, 1(,%ebx,(2+2))
# '*'
# CHECK: call a
# CHECK: calll a
call a
# CHECK: call *%eax
# CHECK: calll *%eax
call *%eax
# CHECK: call *4(%eax)
# CHECK: calll *4(%eax)
call *4(%eax)
# CHECK: movl %gs:8, %eax