RegisterCoalescer::reMaterializeTrivialDef() can constrain the destination

register class to match the defining instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175130 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Cameron Zwarich 2013-02-14 03:25:24 +00:00
parent a94d32284a
commit 1f258a6d53

View File

@ -769,7 +769,7 @@ bool RegisterCoalescer::reMaterializeTrivialDef(CoalescerPair &CP,
// extract_subreg, insert_subreg, subreg_to_reg coalescing.
const TargetRegisterClass *RC = TII->getRegClass(MCID, 0, TRI, *MF);
if (TargetRegisterInfo::isVirtualRegister(DstReg)) {
if (MRI->getRegClass(DstReg) != RC)
if (!MRI->constrainRegClass(DstReg, RC))
return false;
} else if (!RC->contains(DstReg))
return false;