Re-materalized definition instructions may be dead. Whack them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-09-19 17:38:47 +00:00
parent 6f4266506b
commit 20580a1cf6
3 changed files with 48 additions and 7 deletions

View File

@ -479,6 +479,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt,
li_->ReplaceMachineInstrInMaps(CopyMI, NewMI);
CopyMI->eraseFromParent();
ReMatCopies.insert(CopyMI);
ReMatDefs.insert(DefMI);
++NumReMats;
return true;
}
@ -2183,6 +2184,7 @@ void SimpleRegisterCoalescing::printRegName(unsigned reg) const {
void SimpleRegisterCoalescing::releaseMemory() {
JoinedCopies.clear();
ReMatCopies.clear();
ReMatDefs.clear();
}
static bool isZeroLengthInterval(LiveInterval *li) {
@ -2291,25 +2293,45 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
continue;
}
// Now check if this is a remat'ed def instruction which is now dead.
if (ReMatDefs.count(MI)) {
bool isDead = true;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
if (!MO.isRegister() || MO.isDead())
continue;
unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
!mri_->use_empty(Reg)) {
isDead = false;
break;
}
}
if (isDead) {
li_->RemoveMachineInstrFromMaps(mii);
mii = mbbi->erase(mii);
}
}
// If the move will be an identity move delete it
bool isMove = tii_->isMoveInstr(*mii, SrcReg, DstReg);
bool isMove = tii_->isMoveInstr(*MI, SrcReg, DstReg);
if (isMove && SrcReg == DstReg) {
if (li_->hasInterval(SrcReg)) {
LiveInterval &RegInt = li_->getInterval(SrcReg);
// If def of this move instruction is dead, remove its live range
// from the dstination register's live interval.
if (mii->registerDefIsDead(DstReg)) {
if (!ShortenDeadCopySrcLiveRange(RegInt, mii))
ShortenDeadCopyLiveRange(RegInt, mii);
if (MI->registerDefIsDead(DstReg)) {
if (!ShortenDeadCopySrcLiveRange(RegInt, MI))
ShortenDeadCopyLiveRange(RegInt, MI);
}
}
li_->RemoveMachineInstrFromMaps(mii);
li_->RemoveMachineInstrFromMaps(MI);
mii = mbbi->erase(mii);
++numPeep;
} else if (!isMove || !TurnCopyIntoImpDef(mii, mbb, DstReg, SrcReg)) {
SmallSet<unsigned, 4> UniqueUses;
for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
const MachineOperand &mop = mii->getOperand(i);
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &mop = MI->getOperand(i);
if (mop.isRegister() && mop.getReg() &&
TargetRegisterInfo::isVirtualRegister(mop.getReg())) {
unsigned reg = mop.getReg();

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@ -100,6 +100,10 @@ namespace llvm {
///
SmallPtrSet<MachineInstr*, 32> ReMatCopies;
/// ReMatDefs - Keep track of definition instructions which have
/// been remat'ed.
SmallPtrSet<MachineInstr*, 8> ReMatDefs;
public:
static char ID; // Pass identifcation, replacement for typeid
SimpleRegisterCoalescing() : MachineFunctionPass(&ID) {}

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@ -0,0 +1,15 @@
; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep xor | count 3
@val = internal global i64 0 ; <i64*> [#uses=1]
@"\01LC" = internal constant [7 x i8] c"0x%lx\0A\00" ; <[7 x i8]*> [#uses=1]
define i32 @main() nounwind {
entry:
%0 = tail call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* @val, i64 0, i64 1) ; <i64> [#uses=1]
%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i64 0), i64 %0) nounwind ; <i32> [#uses=0]
ret i32 0
}
declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64*, i64, i64) nounwind
declare i32 @printf(i8*, ...) nounwind