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Re-materalized definition instructions may be dead. Whack them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -479,6 +479,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt,
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li_->ReplaceMachineInstrInMaps(CopyMI, NewMI);
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CopyMI->eraseFromParent();
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ReMatCopies.insert(CopyMI);
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ReMatDefs.insert(DefMI);
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++NumReMats;
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return true;
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}
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@ -2183,6 +2184,7 @@ void SimpleRegisterCoalescing::printRegName(unsigned reg) const {
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void SimpleRegisterCoalescing::releaseMemory() {
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JoinedCopies.clear();
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ReMatCopies.clear();
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ReMatDefs.clear();
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}
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static bool isZeroLengthInterval(LiveInterval *li) {
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@ -2291,25 +2293,45 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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continue;
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}
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// Now check if this is a remat'ed def instruction which is now dead.
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if (ReMatDefs.count(MI)) {
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bool isDead = true;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegister() || MO.isDead())
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continue;
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unsigned Reg = MO.getReg();
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if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
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!mri_->use_empty(Reg)) {
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isDead = false;
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break;
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}
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}
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if (isDead) {
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li_->RemoveMachineInstrFromMaps(mii);
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mii = mbbi->erase(mii);
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}
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}
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// If the move will be an identity move delete it
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bool isMove = tii_->isMoveInstr(*mii, SrcReg, DstReg);
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bool isMove = tii_->isMoveInstr(*MI, SrcReg, DstReg);
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if (isMove && SrcReg == DstReg) {
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if (li_->hasInterval(SrcReg)) {
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LiveInterval &RegInt = li_->getInterval(SrcReg);
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// If def of this move instruction is dead, remove its live range
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// from the dstination register's live interval.
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if (mii->registerDefIsDead(DstReg)) {
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if (!ShortenDeadCopySrcLiveRange(RegInt, mii))
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ShortenDeadCopyLiveRange(RegInt, mii);
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if (MI->registerDefIsDead(DstReg)) {
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if (!ShortenDeadCopySrcLiveRange(RegInt, MI))
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ShortenDeadCopyLiveRange(RegInt, MI);
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}
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}
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li_->RemoveMachineInstrFromMaps(mii);
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li_->RemoveMachineInstrFromMaps(MI);
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mii = mbbi->erase(mii);
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++numPeep;
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} else if (!isMove || !TurnCopyIntoImpDef(mii, mbb, DstReg, SrcReg)) {
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SmallSet<unsigned, 4> UniqueUses;
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for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
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const MachineOperand &mop = mii->getOperand(i);
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &mop = MI->getOperand(i);
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if (mop.isRegister() && mop.getReg() &&
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TargetRegisterInfo::isVirtualRegister(mop.getReg())) {
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unsigned reg = mop.getReg();
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@ -100,6 +100,10 @@ namespace llvm {
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///
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SmallPtrSet<MachineInstr*, 32> ReMatCopies;
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/// ReMatDefs - Keep track of definition instructions which have
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/// been remat'ed.
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SmallPtrSet<MachineInstr*, 8> ReMatDefs;
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public:
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static char ID; // Pass identifcation, replacement for typeid
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SimpleRegisterCoalescing() : MachineFunctionPass(&ID) {}
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15
test/CodeGen/X86/coalescer-remat.ll
Normal file
15
test/CodeGen/X86/coalescer-remat.ll
Normal file
@ -0,0 +1,15 @@
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep xor | count 3
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@val = internal global i64 0 ; <i64*> [#uses=1]
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@"\01LC" = internal constant [7 x i8] c"0x%lx\0A\00" ; <[7 x i8]*> [#uses=1]
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define i32 @main() nounwind {
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entry:
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%0 = tail call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* @val, i64 0, i64 1) ; <i64> [#uses=1]
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%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i64 0), i64 %0) nounwind ; <i32> [#uses=0]
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ret i32 0
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}
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declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64*, i64, i64) nounwind
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declare i32 @printf(i8*, ...) nounwind
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