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Handle regmasks in MachineCSE.

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Don't attempt to extend physreg live ranges across calls.

<rdar://problem/10942095>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151610 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-02-28 02:08:50 +00:00
parent 33177f591a
commit 2129a0f677
2 changed files with 37 additions and 0 deletions
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6
lib/CodeGen/MachineCSE.cpp
View File

@ -170,6 +170,8 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
bool SeenDef = false;
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I->getOperand(i);
if (MO.isRegMask() && MO.clobbersPhysReg(Reg))
SeenDef = true;
if (!MO.isReg() || !MO.getReg())
continue;
if (!TRI->regsOverlap(MO.getReg(), Reg))
@ -271,6 +273,10 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I->getOperand(i);
// RegMasks go on instructions like calls that clobber lots of physregs.
// Don't attempt to CSE across such an instruction.
if (MO.isRegMask())
return false;
if (!MO.isReg() || !MO.isDef())
continue;
unsigned MOReg = MO.getReg();

31
test/CodeGen/ARM/cse-call.ll Normal file
View File

@ -0,0 +1,31 @@
; RUN: llc < %s -mcpu=arm1136jf-s -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
target triple = "armv6-apple-ios0.0.0"
; Don't CSE a cmp across a call that clobbers CPSR.
;
; CHECK: cmp
; CHECK: S_trimzeros
; CHECK: cmp
; CHECK: strlen
@F_floatmul.man1 = external global [200 x i8], align 1
@F_floatmul.man2 = external global [200 x i8], align 1
declare i32 @strlen(i8* nocapture) nounwind readonly
declare void @S_trimzeros(...)
define i8* @F_floatmul(i8* %f1, i8* %f2) nounwind ssp {
entry:
br i1 undef, label %while.end42, label %while.body37
while.body37: ; preds = %while.body37, %entry
br i1 false, label %while.end42, label %while.body37
while.end42: ; preds = %while.body37, %entry
%. = select i1 undef, i8* getelementptr inbounds ([200 x i8]* @F_floatmul.man1, i32 0, i32 0), i8* getelementptr inbounds ([200 x i8]* @F_floatmul.man2, i32 0, i32 0)
%.92 = select i1 undef, i8* getelementptr inbounds ([200 x i8]* @F_floatmul.man2, i32 0, i32 0), i8* getelementptr inbounds ([200 x i8]* @F_floatmul.man1, i32 0, i32 0)
tail call void bitcast (void (...)* @S_trimzeros to void (i8*)*)(i8* %.92) nounwind
%call47 = tail call i32 @strlen(i8* %.) nounwind
unreachable
}