6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-28 09:31:03 +00:00
Code Issues Projects Releases Wiki Activity

fix PR6642, GVN forwarding from memset to load of the base of the memset.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99488 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-03-25 05:58:19 +00:00
parent c388ace6f9
commit 219d77430b
2 changed files with 19 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
lib/Transforms/Scalar/GVN.cpp
View File

@ -1004,18 +1004,18 @@ static int AnalyzeLoadFromClobberingWrite(const Type *LoadTy, Value *LoadPtr,
// If the load and store are to the exact same address, they should have been // If the load and store are to the exact same address, they should have been
// a must alias. AA must have gotten confused. // a must alias. AA must have gotten confused.
// FIXME: Study to see if/when this happens. // FIXME: Study to see if/when this happens. One case is forwarding a memset
if (LoadOffset == StoreOffset) { // to a load from the base of the memset.
#if 0 #if 0
if (LoadOffset == StoreOffset) {
dbgs() << "STORE/LOAD DEP WITH COMMON POINTER MISSED:\n" dbgs() << "STORE/LOAD DEP WITH COMMON POINTER MISSED:\n"
<< "Base = " << *StoreBase << "\n" << "Base = " << *StoreBase << "\n"
<< "Store Ptr = " << *WritePtr << "\n" << "Store Ptr = " << *WritePtr << "\n"
<< "Store Offs = " << StoreOffset << "\n" << "Store Offs = " << StoreOffset << "\n"
<< "Load Ptr = " << *LoadPtr << "\n"; << "Load Ptr = " << *LoadPtr << "\n";
abort(); abort();
#endif
return -1;
} }
#endif
// If the load and store don't overlap at all, the store doesn't provide // If the load and store don't overlap at all, the store doesn't provide
// anything to the load. In this case, they really don't alias at all, AA // anything to the load. In this case, they really don't alias at all, AA
@ -1031,11 +1031,11 @@ static int AnalyzeLoadFromClobberingWrite(const Type *LoadTy, Value *LoadPtr,
bool isAAFailure = false; bool isAAFailure = false;
if (StoreOffset < LoadOffset) { if (StoreOffset < LoadOffset)
isAAFailure = StoreOffset+int64_t(StoreSize) <= LoadOffset; isAAFailure = StoreOffset+int64_t(StoreSize) <= LoadOffset;
} else { else
isAAFailure = LoadOffset+int64_t(LoadSize) <= StoreOffset; isAAFailure = LoadOffset+int64_t(LoadSize) <= StoreOffset;
}
if (isAAFailure) { if (isAAFailure) {
#if 0 #if 0
dbgs() << "STORE LOAD DEP WITH COMMON BASE:\n" dbgs() << "STORE LOAD DEP WITH COMMON BASE:\n"

12
test/Transforms/GVN/rle.ll
View File

@ -531,4 +531,16 @@ out:
} }
; PR6642
define i32 @memset_to_load() nounwind readnone {
entry:
%x = alloca [256 x i32], align 4 ; <[256 x i32]*> [#uses=2]
%tmp = bitcast [256 x i32]* %x to i8* ; <i8*> [#uses=1]
call void @llvm.memset.i64(i8* %tmp, i8 0, i64 1024, i32 4)
%arraydecay = getelementptr inbounds [256 x i32]* %x, i32 0, i32 0 ; <i32*>
%tmp1 = load i32* %arraydecay ; <i32> [#uses=1]
ret i32 %tmp1
; CHECK: @memset_to_load
; CHECK: ret i32 0
}