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Rename sat_shift operand to shift_imm, in preparation for using it for other

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instructions besides saturate instructions.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111168 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-08-16 18:27:34 +00:00
parent de78f05cf7
commit 22f5dc79c0
6 changed files with 18 additions and 15 deletions
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6
lib/Target/ARM/ARMAsmPrinter.cpp
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@ -124,7 +124,7 @@ namespace {
raw_ostream &O);
void printMemBOption(const MachineInstr *MI, int OpNum,
raw_ostream &O);
void printSatShiftOperand(const MachineInstr *MI, int OpNum,
void printShiftImmOperand(const MachineInstr *MI, int OpNum,
raw_ostream &O);
void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum,
@ -680,7 +680,7 @@ ARMAsmPrinter::printMemBOption(const MachineInstr *MI, int OpNum,
O << ARM_MB::MemBOptToString(val);
}
void ARMAsmPrinter::printSatShiftOperand(const MachineInstr *MI, int OpNum,
void ARMAsmPrinter::printShiftImmOperand(const MachineInstr *MI, int OpNum,
raw_ostream &O) {
unsigned ShiftOp = MI->getOperand(OpNum).getImm();
ARM_AM::ShiftOpc Opc = ARM_AM::getSORegShOp(ShiftOp);
@ -694,7 +694,7 @@ void ARMAsmPrinter::printSatShiftOperand(const MachineInstr *MI, int OpNum,
O << ", asr #";
break;
default:
assert(0 && "unexpected shift opcode for saturate shift operand");
assert(0 && "unexpected shift opcode for shift immediate operand");
}
O << ARM_AM::getSORegOffset(ShiftOp);
}

15
lib/Target/ARM/ARMInstrInfo.td
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@ -296,6 +296,13 @@ def pclabel : Operand<i32> {
let PrintMethod = "printPCLabel";
}
// shift_imm: An integer that encodes a shift amount and the type of shift
// (currently either asr or lsl) using the same encoding used for the
// immediates in so_reg operands.
def shift_imm : Operand<i32> {
let PrintMethod = "printShiftImmOperand";
}
// shifter_operand operands: so_reg and so_imm.
def so_reg : Operand<i32>, // reg reg imm
ComplexPattern<i32, 3, "SelectShifterOperandReg",
@ -1805,11 +1812,7 @@ def USADA8 : AI<(outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
// Signed/Unsigned saturate -- for disassembly only
def sat_shift : Operand<i32> {
let PrintMethod = "printSatShiftOperand";
}
def SSAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, sat_shift:$sh),
def SSAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh),
SatFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh",
[/* For disassembly only; pattern left blank */]> {
let Inst{27-21} = 0b0110101;
@ -1823,7 +1826,7 @@ def SSAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), SatFrm,
let Inst{7-4} = 0b0011;
}
def USAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, sat_shift:$sh),
def USAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh),
SatFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a$sh",
[/* For disassembly only; pattern left blank */]> {
let Inst{27-21} = 0b0110111;

4
lib/Target/ARM/ARMInstrThumb2.td
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@ -1523,7 +1523,7 @@ def t2USADA8 : T2I_mac<0, 0b111, 0b0000, (outs rGPR:$dst),
// Signed/Unsigned saturate -- for disassembly only
def t2SSAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, sat_shift:$sh),
def t2SSAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, shift_imm:$sh),
NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh",
[/* For disassembly only; pattern left blank */]> {
let Inst{31-27} = 0b11110;
@ -1544,7 +1544,7 @@ def t2SSAT16: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a), NoItinerary,
let Inst{7-6} = 0b00; // imm2 = '00'
}
def t2USAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, sat_shift:$sh),
def t2USAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, shift_imm:$sh),
NoItinerary, "usat", "\t$dst, $bit_pos, $a$sh",
[/* For disassembly only; pattern left blank */]> {
let Inst{31-27} = 0b11110;

4
lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
View File

@ -478,7 +478,7 @@ void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum,
O << ARM_MB::MemBOptToString(val);
}
void ARMInstPrinter::printSatShiftOperand(const MCInst *MI, unsigned OpNum,
void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
unsigned ShiftOp = MI->getOperand(OpNum).getImm();
ARM_AM::ShiftOpc Opc = ARM_AM::getSORegShOp(ShiftOp);
@ -492,7 +492,7 @@ void ARMInstPrinter::printSatShiftOperand(const MCInst *MI, unsigned OpNum,
O << ", asr #";
break;
default:
assert(0 && "unexpected shift opcode for saturate shift operand");
assert(0 && "unexpected shift opcode for shift immediate operand");
}
O << ARM_AM::getSORegOffset(ShiftOp);
}

2
lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
View File

@ -58,7 +58,7 @@ public:
void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
void printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printSatShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O);

2
utils/TableGen/EDEmitter.cpp
View File

@ -608,7 +608,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
IMM("jt2block_operand");
IMM("t_imm_s4");
IMM("pclabel");
IMM("sat_shift");
IMM("shift_imm");
MISC("brtarget", "kOperandTypeARMBranchTarget"); // ?
MISC("so_reg", "kOperandTypeARMSoReg"); // R, R, I