diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index ded9800052e..fc1508670de 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -124,7 +124,7 @@ namespace { raw_ostream &O); void printMemBOption(const MachineInstr *MI, int OpNum, raw_ostream &O); - void printSatShiftOperand(const MachineInstr *MI, int OpNum, + void printShiftImmOperand(const MachineInstr *MI, int OpNum, raw_ostream &O); void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum, @@ -680,7 +680,7 @@ ARMAsmPrinter::printMemBOption(const MachineInstr *MI, int OpNum, O << ARM_MB::MemBOptToString(val); } -void ARMAsmPrinter::printSatShiftOperand(const MachineInstr *MI, int OpNum, +void ARMAsmPrinter::printShiftImmOperand(const MachineInstr *MI, int OpNum, raw_ostream &O) { unsigned ShiftOp = MI->getOperand(OpNum).getImm(); ARM_AM::ShiftOpc Opc = ARM_AM::getSORegShOp(ShiftOp); @@ -694,7 +694,7 @@ void ARMAsmPrinter::printSatShiftOperand(const MachineInstr *MI, int OpNum, O << ", asr #"; break; default: - assert(0 && "unexpected shift opcode for saturate shift operand"); + assert(0 && "unexpected shift opcode for shift immediate operand"); } O << ARM_AM::getSORegOffset(ShiftOp); } diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index aeaf3428720..6fa99aec3f3 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -296,6 +296,13 @@ def pclabel : Operand { let PrintMethod = "printPCLabel"; } +// shift_imm: An integer that encodes a shift amount and the type of shift +// (currently either asr or lsl) using the same encoding used for the +// immediates in so_reg operands. +def shift_imm : Operand { + let PrintMethod = "printShiftImmOperand"; +} + // shifter_operand operands: so_reg and so_imm. def so_reg : Operand, // reg reg imm ComplexPattern { - let PrintMethod = "printSatShiftOperand"; -} - -def SSAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, sat_shift:$sh), +def SSAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh), SatFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh", [/* For disassembly only; pattern left blank */]> { let Inst{27-21} = 0b0110101; @@ -1823,7 +1826,7 @@ def SSAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), SatFrm, let Inst{7-4} = 0b0011; } -def USAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, sat_shift:$sh), +def USAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh), SatFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a$sh", [/* For disassembly only; pattern left blank */]> { let Inst{27-21} = 0b0110111; diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 1e8d80aed29..2bde236fa86 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1523,7 +1523,7 @@ def t2USADA8 : T2I_mac<0, 0b111, 0b0000, (outs rGPR:$dst), // Signed/Unsigned saturate -- for disassembly only -def t2SSAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, sat_shift:$sh), +def t2SSAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, shift_imm:$sh), NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh", [/* For disassembly only; pattern left blank */]> { let Inst{31-27} = 0b11110; @@ -1544,7 +1544,7 @@ def t2SSAT16: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a), NoItinerary, let Inst{7-6} = 0b00; // imm2 = '00' } -def t2USAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, sat_shift:$sh), +def t2USAT: T2I<(outs rGPR:$dst), (ins i32imm:$bit_pos, rGPR:$a, shift_imm:$sh), NoItinerary, "usat", "\t$dst, $bit_pos, $a$sh", [/* For disassembly only; pattern left blank */]> { let Inst{31-27} = 0b11110; diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp index b662289cd50..72476c77648 100644 --- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp @@ -478,7 +478,7 @@ void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum, O << ARM_MB::MemBOptToString(val); } -void ARMInstPrinter::printSatShiftOperand(const MCInst *MI, unsigned OpNum, +void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { unsigned ShiftOp = MI->getOperand(OpNum).getImm(); ARM_AM::ShiftOpc Opc = ARM_AM::getSORegShOp(ShiftOp); @@ -492,7 +492,7 @@ void ARMInstPrinter::printSatShiftOperand(const MCInst *MI, unsigned OpNum, O << ", asr #"; break; default: - assert(0 && "unexpected shift opcode for saturate shift operand"); + assert(0 && "unexpected shift opcode for shift immediate operand"); } O << ARM_AM::getSORegOffset(ShiftOp); } diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h index 3eaa6f78823..e5ad0d07e9b 100644 --- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h +++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h @@ -58,7 +58,7 @@ public: void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O); - void printSatShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O); diff --git a/utils/TableGen/EDEmitter.cpp b/utils/TableGen/EDEmitter.cpp index 8706ed5426e..10c06268f07 100644 --- a/utils/TableGen/EDEmitter.cpp +++ b/utils/TableGen/EDEmitter.cpp @@ -608,7 +608,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type, IMM("jt2block_operand"); IMM("t_imm_s4"); IMM("pclabel"); - IMM("sat_shift"); + IMM("shift_imm"); MISC("brtarget", "kOperandTypeARMBranchTarget"); // ? MISC("so_reg", "kOperandTypeARMSoReg"); // R, R, I