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https://github.com/c64scene-ar/llvm-6502.git
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Remove code for patterns that are autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23532 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -847,9 +847,8 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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}
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}
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CurDAG->SelectNodeTo(N, PPC::DIVW, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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// Other cases are autogenerated.
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break;
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}
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case ISD::UDIV: {
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// If this is a divide by constant, we can emit code using some magic
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@ -861,9 +860,8 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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return Result;
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}
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CurDAG->SelectNodeTo(N, PPC::DIVWU, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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// Other cases are autogenerated.
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break;
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}
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case ISD::AND: {
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unsigned Imm;
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@ -884,18 +882,9 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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getI32Imm(MB), getI32Imm(ME));
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return SDOperand(N, 0);
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}
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// Finally, check for the case where we are being asked to select
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// and (not(a), b) or and (a, not(b)) which can be selected as andc.
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if (isOprNot(N->getOperand(0).Val))
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CurDAG->SelectNodeTo(N, PPC::ANDC, MVT::i32, Select(N->getOperand(1)),
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Select(N->getOperand(0).getOperand(0)));
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else if (isOprNot(N->getOperand(1).Val))
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CurDAG->SelectNodeTo(N, PPC::ANDC, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1).getOperand(0)));
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else
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CurDAG->SelectNodeTo(N, PPC::AND, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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// Other cases are autogenerated.
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break;
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}
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case ISD::OR:
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if (SDNode *I = SelectBitfieldInsert(N))
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@ -906,18 +895,8 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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PPC::ORIS, PPC::ORI))
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return CodeGenMap[Op] = SDOperand(I, 0);
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// Finally, check for the case where we are being asked to select
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// 'or (not(a), b)' or 'or (a, not(b))' which can be selected as orc.
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if (isOprNot(N->getOperand(0).Val))
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CurDAG->SelectNodeTo(N, PPC::ORC, MVT::i32, Select(N->getOperand(1)),
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Select(N->getOperand(0).getOperand(0)));
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else if (isOprNot(N->getOperand(1).Val))
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CurDAG->SelectNodeTo(N, PPC::ORC, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1).getOperand(0)));
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else
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CurDAG->SelectNodeTo(N, PPC::OR, MVT::i32, Select(N->getOperand(0)),
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Select(N->getOperand(1)));
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return SDOperand(N, 0);
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// Other cases are autogenerated.
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break;
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case ISD::SHL: {
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unsigned Imm, SH, MB, ME;
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if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) &&
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