mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-06 23:32:27 +00:00
Fix QOpcode assignment to Opc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113837 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
08047f6169
commit
23da0b23a3
@ -1278,8 +1278,8 @@ SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad,
|
||||
Ops.push_back(MemAddr);
|
||||
Ops.push_back(Align);
|
||||
|
||||
unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
|
||||
Opc = QOpcodes[OpcodeIndex]);
|
||||
unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
|
||||
QOpcodes[OpcodeIndex]);
|
||||
|
||||
SDValue SuperReg;
|
||||
SDValue V0 = N->getOperand(0+3);
|
||||
|
Loading…
x
Reference in New Issue
Block a user