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R600/SI: Remove redundant setting of instruction bits

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These are all set on the instruction base classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220091 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
2014-10-17 21:13:11 +00:00
parent d2dcbd00f7
commit 24463c7df7
1 changed files with 0 additions and 4 deletions
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4
lib/Target/R600/SIInstructions.td
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@@ -1509,16 +1509,12 @@ defm V_CUBETC_F32 : VOP3Inst <vop3<0x146>, "V_CUBETC_F32",
defm V_CUBEMA_F32 : VOP3Inst <vop3<0x147>, "V_CUBEMA_F32", defm V_CUBEMA_F32 : VOP3Inst <vop3<0x147>, "V_CUBEMA_F32",
VOP_F32_F32_F32_F32 VOP_F32_F32_F32_F32
>; >;
let neverHasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
defm V_BFE_U32 : VOP3Inst <vop3<0x148>, "V_BFE_U32", defm V_BFE_U32 : VOP3Inst <vop3<0x148>, "V_BFE_U32",
VOP_I32_I32_I32_I32, AMDGPUbfe_u32 VOP_I32_I32_I32_I32, AMDGPUbfe_u32
>; >;
defm V_BFE_I32 : VOP3Inst <vop3<0x149>, "V_BFE_I32", defm V_BFE_I32 : VOP3Inst <vop3<0x149>, "V_BFE_I32",
VOP_I32_I32_I32_I32, AMDGPUbfe_i32 VOP_I32_I32_I32_I32, AMDGPUbfe_i32
>; >;
}
defm V_BFI_B32 : VOP3Inst <vop3<0x14a>, "V_BFI_B32", defm V_BFI_B32 : VOP3Inst <vop3<0x14a>, "V_BFI_B32",
VOP_I32_I32_I32_I32, AMDGPUbfi VOP_I32_I32_I32_I32, AMDGPUbfi
>; >;