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[ms-inline asm] Add the OpDecl to the InlineAsmIdentifierInfo struct and in turn
the MCParsedAsmOperand. Part of rdar://13663589 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180054 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -34,10 +34,12 @@ class Twine;
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class MCAsmParserSemaCallback {
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class MCAsmParserSemaCallback {
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public:
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public:
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typedef struct {
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typedef struct {
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void *OpDecl;
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bool IsVarDecl;
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bool IsVarDecl;
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unsigned Length, Size, Type;
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unsigned Length, Size, Type;
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void clear() {
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void clear() {
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OpDecl = 0;
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IsVarDecl = false;
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IsVarDecl = false;
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Length = 1;
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Length = 1;
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Size = 0;
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Size = 0;
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@ -38,6 +38,7 @@ public:
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unsigned getMCOperandNum() { return MCOperandNum; }
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unsigned getMCOperandNum() { return MCOperandNum; }
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virtual StringRef getSymName() { return StringRef(); }
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virtual StringRef getSymName() { return StringRef(); }
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virtual void *getOpDecl() { return 0; }
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/// isToken - Is this a token operand?
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/// isToken - Is this a token operand?
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virtual bool isToken() const = 0;
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virtual bool isToken() const = 0;
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@ -614,6 +614,7 @@ struct X86Operand : public MCParsedAsmOperand {
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SMLoc StartLoc, EndLoc;
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SMLoc StartLoc, EndLoc;
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SMLoc OffsetOfLoc;
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SMLoc OffsetOfLoc;
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StringRef SymName;
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StringRef SymName;
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void *OpDecl;
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bool AddressOf;
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bool AddressOf;
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struct TokOp {
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struct TokOp {
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@ -649,6 +650,7 @@ struct X86Operand : public MCParsedAsmOperand {
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: Kind(K), StartLoc(Start), EndLoc(End) {}
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: Kind(K), StartLoc(Start), EndLoc(End) {}
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StringRef getSymName() { return SymName; }
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StringRef getSymName() { return SymName; }
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void *getOpDecl() { return OpDecl; }
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/// getStartLoc - Get the location of the first token of this operand.
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/// getStartLoc - Get the location of the first token of this operand.
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SMLoc getStartLoc() const { return StartLoc; }
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SMLoc getStartLoc() const { return StartLoc; }
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@ -914,12 +916,14 @@ struct X86Operand : public MCParsedAsmOperand {
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static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc,
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static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc,
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bool AddressOf = false,
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bool AddressOf = false,
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SMLoc OffsetOfLoc = SMLoc(),
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SMLoc OffsetOfLoc = SMLoc(),
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StringRef SymName = StringRef()) {
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StringRef SymName = StringRef(),
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void *OpDecl = 0) {
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X86Operand *Res = new X86Operand(Register, StartLoc, EndLoc);
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X86Operand *Res = new X86Operand(Register, StartLoc, EndLoc);
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Res->Reg.RegNo = RegNo;
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Res->Reg.RegNo = RegNo;
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Res->AddressOf = AddressOf;
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Res->AddressOf = AddressOf;
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Res->OffsetOfLoc = OffsetOfLoc;
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Res->OffsetOfLoc = OffsetOfLoc;
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Res->SymName = SymName;
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Res->SymName = SymName;
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Res->OpDecl = OpDecl;
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return Res;
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return Res;
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}
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}
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@ -931,8 +935,8 @@ struct X86Operand : public MCParsedAsmOperand {
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/// Create an absolute memory operand.
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/// Create an absolute memory operand.
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static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
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static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
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unsigned Size = 0,
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unsigned Size = 0, StringRef SymName = StringRef(),
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StringRef SymName = StringRef()) {
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void *OpDecl = 0) {
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X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
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X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
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Res->Mem.SegReg = 0;
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Res->Mem.SegReg = 0;
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Res->Mem.Disp = Disp;
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Res->Mem.Disp = Disp;
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@ -941,6 +945,7 @@ struct X86Operand : public MCParsedAsmOperand {
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Res->Mem.Scale = 1;
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Res->Mem.Scale = 1;
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Res->Mem.Size = Size;
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Res->Mem.Size = Size;
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Res->SymName = SymName;
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Res->SymName = SymName;
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Res->OpDecl = OpDecl;
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Res->AddressOf = false;
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Res->AddressOf = false;
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return Res;
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return Res;
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}
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}
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@ -950,7 +955,8 @@ struct X86Operand : public MCParsedAsmOperand {
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unsigned BaseReg, unsigned IndexReg,
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unsigned BaseReg, unsigned IndexReg,
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unsigned Scale, SMLoc StartLoc, SMLoc EndLoc,
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unsigned Scale, SMLoc StartLoc, SMLoc EndLoc,
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unsigned Size = 0,
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unsigned Size = 0,
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StringRef SymName = StringRef()) {
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StringRef SymName = StringRef(),
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void *OpDecl = 0) {
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// We should never just have a displacement, that should be parsed as an
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// We should never just have a displacement, that should be parsed as an
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// absolute memory operand.
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// absolute memory operand.
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assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
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assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
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@ -966,6 +972,7 @@ struct X86Operand : public MCParsedAsmOperand {
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Res->Mem.Scale = Scale;
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Res->Mem.Scale = Scale;
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Res->Mem.Size = Size;
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Res->Mem.Size = Size;
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Res->SymName = SymName;
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Res->SymName = SymName;
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Res->OpDecl = OpDecl;
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Res->AddressOf = false;
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Res->AddressOf = false;
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return Res;
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return Res;
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}
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}
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@ -1128,8 +1135,6 @@ X86AsmParser::CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
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unsigned Scale, SMLoc Start, SMLoc End,
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unsigned Scale, SMLoc Start, SMLoc End,
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unsigned Size, StringRef Identifier,
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unsigned Size, StringRef Identifier,
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InlineAsmIdentifierInfo &Info){
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InlineAsmIdentifierInfo &Info){
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if (Disp && isa<MCSymbolRefExpr>(Disp)) {
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if (Disp && isa<MCSymbolRefExpr>(Disp)) {
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// If this is not a VarDecl then assume it is a FuncDecl or some other label
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// If this is not a VarDecl then assume it is a FuncDecl or some other label
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// reference. We need an 'r' constraint here, so we need to create register
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// reference. We need an 'r' constraint here, so we need to create register
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@ -1138,7 +1143,7 @@ X86AsmParser::CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
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if (!Info.IsVarDecl) {
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if (!Info.IsVarDecl) {
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unsigned RegNo = is64BitMode() ? X86::RBX : X86::EBX;
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unsigned RegNo = is64BitMode() ? X86::RBX : X86::EBX;
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return X86Operand::CreateReg(RegNo, Start, End, /*AddressOf=*/true,
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return X86Operand::CreateReg(RegNo, Start, End, /*AddressOf=*/true,
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SMLoc(), Identifier);
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SMLoc(), Identifier, Info.OpDecl);
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}
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}
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if (!Size) {
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if (!Size) {
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Size = Info.Type * 8; // Size is in terms of bits in this context.
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Size = Info.Type * 8; // Size is in terms of bits in this context.
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@ -1153,7 +1158,7 @@ X86AsmParser::CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
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// get the matching correct in some cases.
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// get the matching correct in some cases.
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BaseReg = BaseReg ? BaseReg : 1;
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BaseReg = BaseReg ? BaseReg : 1;
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return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale, Start,
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return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale, Start,
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End, Size, Identifier);
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End, Size, Identifier, Info.OpDecl);
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}
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}
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static void
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static void
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@ -1512,7 +1517,7 @@ X86Operand *X86AsmParser::ParseIntelOffsetOfOperator() {
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// the size of a pointer.
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// the size of a pointer.
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unsigned RegNo = is64BitMode() ? X86::RBX : X86::EBX;
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unsigned RegNo = is64BitMode() ? X86::RBX : X86::EBX;
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return X86Operand::CreateReg(RegNo, Start, End, /*GetAddress=*/true,
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return X86Operand::CreateReg(RegNo, Start, End, /*GetAddress=*/true,
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OffsetOfLoc, Identifier);
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OffsetOfLoc, Identifier, Info.OpDecl);
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}
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}
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enum IntelOperatorKind {
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enum IntelOperatorKind {
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