diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp
index 9fde614f30b..6655ff98e03 100644
--- a/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -56,11 +56,14 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
   MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
   BuildMI(MBB, MBBI, dl,
           TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
+  unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
+  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, -8));
+
   unsigned S1 = MRI->getDwarfRegNum(Mips::S1, true);
-  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, -8));
+  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, -12));
 
   unsigned S0 = MRI->getDwarfRegNum(Mips::S0, true);
-  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, -12));
+  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, -16));
 
   unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
   MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, -4));
@@ -168,6 +171,7 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
   MF.getRegInfo().setPhysRegUsed(Mips::RA);
   MF.getRegInfo().setPhysRegUsed(Mips::S0);
   MF.getRegInfo().setPhysRegUsed(Mips::S1);
+  MF.getRegInfo().setPhysRegUsed(Mips::S2);
 }
 
 const MipsFrameLowering *
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td
index 3eac18fba36..152fd4ca004 100644
--- a/lib/Target/Mips/Mips16InstrInfo.td
+++ b/lib/Target/Mips/Mips16InstrInfo.td
@@ -884,9 +884,9 @@ def OrRxRxRy16: FRxRxRy16_ins<0b01101, "or", IIAlu>, ArithLogic16Defs<1>;
 let ra=1, s=0,s0=1,s1=1 in
 def RestoreRaF16:
   FI8_SVRS16<0b1, (outs), (ins uimm16:$frame_size),
-             "restore\t$$ra,  $$s0, $$s1, $frame_size", [], IILoad >, MayLoad {
+             "restore\t$$ra,  $$s0, $$s1, $$s2, $frame_size", [], IILoad >, MayLoad {
   let isCodeGenOnly = 1;
-  let Defs = [S0, S1, RA, SP];
+  let Defs = [S0, S1, S2, RA, SP];
   let Uses = [SP];
 }
 
@@ -912,9 +912,9 @@ def RestoreIncSpF16:
 let ra=1, s=1,s0=1,s1=1 in
 def SaveRaF16:
   FI8_SVRS16<0b1, (outs), (ins uimm16:$frame_size),
-             "save\t$$ra, $$s0, $$s1, $frame_size", [], IIStore >, MayStore {
+             "save\t$$ra, $$s0, $$s1, $$s2, $frame_size", [], IIStore >, MayStore {
   let isCodeGenOnly = 1;
-  let Uses = [RA, SP, S0, S1];
+  let Uses = [RA, SP, S0, S1, S2];
   let Defs = [SP];
 }
 
diff --git a/test/CodeGen/Mips/align16.ll b/test/CodeGen/Mips/align16.ll
index 815c84d0182..267cff54291 100644
--- a/test/CodeGen/Mips/align16.ll
+++ b/test/CodeGen/Mips/align16.ll
@@ -25,7 +25,7 @@ entry:
   call void @p(i32* %arrayidx1)
   ret void
 }
-; 16:	save	$ra, $s0, $s1, 2040
-; 16:	addiu	$sp, -48 # 16 bit inst
-; 16:	addiu	$sp, 48 # 16 bit inst
-; 16:	restore	$ra,  $s0, $s1, 2040
+; 16:	save	$ra, $s0, $s1, $s2, 2040
+; 16:	addiu	$sp, -56 # 16 bit inst
+; 16:	addiu	$sp, 56 # 16 bit inst
+; 16:	restore	$ra,  $s0, $s1, $s2, 2040
diff --git a/test/CodeGen/Mips/alloca16.ll b/test/CodeGen/Mips/alloca16.ll
index 5ae9a847917..017665f00bd 100644
--- a/test/CodeGen/Mips/alloca16.ll
+++ b/test/CodeGen/Mips/alloca16.ll
@@ -19,8 +19,8 @@ entry:
 
 define void @test() nounwind {
 entry:
-; 16: 	.frame	$16,24,$ra
-; 16: 	save 	$ra, $s0, $s1, 24
+; 16: 	.frame	$sp,24,$ra
+; 16: 	save 	$ra, $s0, $s1, $s2, 24
 ; 16: 	move	$16, $sp
 ; 16:	move	${{[0-9]+}}, $sp
 ; 16:	subu	$[[REGISTER:[0-9]+]], ${{[0-9]+}}, ${{[0-9]+}}
diff --git a/test/CodeGen/Mips/ex2.ll b/test/CodeGen/Mips/ex2.ll
index 9f074d1ff9e..c5535e7661a 100644
--- a/test/CodeGen/Mips/ex2.ll
+++ b/test/CodeGen/Mips/ex2.ll
@@ -6,10 +6,11 @@
 define i32 @main() {
 ; 16-LABEL: main:
 ; 16: 	.cfi_startproc
-; 16: 	save	$ra, $s0, $s1, 32
-; 16:   .cfi_def_cfa_offset 32
-; 16:   .cfi_offset 17, -8
-; 16: 	.cfi_offset 16, -12
+; 16: 	save	$ra, $s0, $s1, $s2, 40
+; 16:   .cfi_def_cfa_offset 40
+; 16:   .cfi_offset 18, -8
+; 16:   .cfi_offset 17, -12
+; 16: 	.cfi_offset 16, -16
 ; 16: 	.cfi_offset 31, -4
 ; 16:   .cfi_endproc
 entry:
diff --git a/test/CodeGen/Mips/helloworld.ll b/test/CodeGen/Mips/helloworld.ll
index 56ee60785f4..83c88ae3441 100644
--- a/test/CodeGen/Mips/helloworld.ll
+++ b/test/CodeGen/Mips/helloworld.ll
@@ -25,7 +25,7 @@ entry:
 ; SR32:  .set noreorder
 ; SR32:  .set nomacro
 ; SR32:  .set noat
-; SR:	save 	$ra, $s0, $s1, [[FS:[0-9]+]]
+; SR:	save 	$ra, $s0, $s1, $s2, [[FS:[0-9]+]]
 ; PE:	li	$[[T1:[0-9]+]], %hi(_gp_disp)
 ; PE: 	addiu	$[[T2:[0-9]+]], $pc, %lo(_gp_disp)
 ; PE:	sll	$[[T3:[0-9]+]], $[[T1]], 16
@@ -35,7 +35,7 @@ entry:
 ; C2:	move	$25, ${{[0-9]+}}
 ; C1:	move 	$gp, ${{[0-9]+}}
 ; C1:	jalrc 	${{[0-9]+}}
-; SR:	restore 	$ra, $s0, $s1, [[FS]]
+; SR:	restore 	$ra, $s0, $s1, $s2, [[FS]]
 ; PE:	li	$2, 0
 ; PE:	jrc 	$ra
 
diff --git a/test/CodeGen/Mips/largefr1.ll b/test/CodeGen/Mips/largefr1.ll
index 89463274b86..9a5fd08d17a 100644
--- a/test/CodeGen/Mips/largefr1.ll
+++ b/test/CodeGen/Mips/largefr1.ll
@@ -24,15 +24,15 @@ entry:
 define i32 @main() nounwind {
 entry:
 ; 1-LABEL: main:
-; 1: 1: 	.word	-797992
+; 1: 1: 	.word	-798000
 ; 1:            lw ${{[0-9]+}}, 1f
 ; 1:            b 2f
 ; 1:            .align 2
-; 1:            .word	800016
+; 1:            .word	800020
 
 ; 1:            b 2f
 ; 1:            .align 2
-; 1:            .word	400016
+; 1:            .word	400020
 
 ; 1:            move ${{[0-9]+}}, $sp
 ; 1:            addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
@@ -42,7 +42,7 @@ entry:
 
 ; 1:            b 2f
 ; 1:            .align 2
-; 1:            .word	400216
+; 1:            .word	400220
 
 ; 1:            move ${{[0-9]+}}, $sp
 ; 1:            addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}