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If a register is both an early clobber and part of a tied use, handle the use

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before the clobber so that we copy the value if needed.

Fixes pr11415.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145056 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
2011-11-22 06:27:18 +00:00
parent f7de577a08
commit 254a13282c
2 changed files with 39 additions and 7 deletions
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23
lib/CodeGen/RegAllocFast.cpp
View File

@ -682,7 +682,7 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
} }
SmallVector<unsigned, 8> PartialDefs; SmallVector<unsigned, 8> PartialDefs;
DEBUG(dbgs() << "Allocating tied uses and early clobbers.\n"); DEBUG(dbgs() << "Allocating tied uses.\n");
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i); MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg()) continue; if (!MO.isReg()) continue;
@ -704,15 +704,24 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
// That would confuse the later phys-def processing pass. // That would confuse the later phys-def processing pass.
LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, 0); LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, 0);
PartialDefs.push_back(LRI->second.PhysReg); PartialDefs.push_back(LRI->second.PhysReg);
} else if (MO.isEarlyClobber()) {
// Note: defineVirtReg may invalidate MO.
LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0);
unsigned PhysReg = LRI->second.PhysReg;
if (setPhysReg(MI, i, PhysReg))
VirtDead.push_back(Reg);
} }
} }
DEBUG(dbgs() << "Allocating early clobbers.\n");
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg()) continue;
unsigned Reg = MO.getReg();
if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue;
if (!MO.isEarlyClobber())
continue;
// Note: defineVirtReg may invalidate MO.
LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0);
unsigned PhysReg = LRI->second.PhysReg;
if (setPhysReg(MI, i, PhysReg))
VirtDead.push_back(Reg);
}
// Restore UsedInInstr to a state usable for allocating normal virtual uses. // Restore UsedInInstr to a state usable for allocating normal virtual uses.
UsedInInstr.reset(); UsedInInstr.reset();
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {

23
test/CodeGen/X86/pr11415.ll Normal file
View File

@ -0,0 +1,23 @@
; RUN: llc %s -o - -regalloc=fast | FileCheck %s
; We used to consider the early clobber in the second asm statement as
; defining %0 before it was read. This caused us to omit the
; movq -8(%rsp), %rdx
; CHECK: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movq %rcx, %rax
; CHECK-NEXT: movq %rax, -8(%rsp)
; CHECK-NEXT: movq -8(%rsp), %rdx
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movq %rdx, %rax
; CHECK-NEXT: movq %rdx, -8(%rsp)
; CHECK-NEXT: ret
define i64 @foo() {
entry:
%0 = tail call i64 asm "", "={cx}"() nounwind
%1 = tail call i64 asm "", "=&r,0,r,~{rax}"(i64 %0, i64 %0) nounwind
ret i64 %1
}