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Fix for codegen bug that could cause illegal cmn instruction generation
In rare cases the dead definition elimination pass code can cause illegal cmn instructions when it replaces dead registers on instructions that use unmaterialized frame indexes. This patch disables the dead definition optimization for instructions which include frame index operands. rdar://16438284 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206208 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -30,7 +30,7 @@ private:
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const TargetRegisterInfo *TRI;
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bool implicitlyDefinesSubReg(unsigned Reg, const MachineInstr *MI);
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bool processMachineBasicBlock(MachineBasicBlock *MBB);
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bool usesFrameIndex(const MachineInstr *MI);
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public:
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static char ID; // Pass identification, replacement for typeid.
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explicit ARM64DeadRegisterDefinitions() : MachineFunctionPass(ID) {}
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@ -57,12 +57,27 @@ bool ARM64DeadRegisterDefinitions::implicitlyDefinesSubReg(
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return false;
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}
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bool ARM64DeadRegisterDefinitions::usesFrameIndex(const MachineInstr *MI) {
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for (int I = MI->getDesc().getNumDefs(), E = MI->getNumOperands(); I != E; ++I) {
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if (MI->getOperand(I).isFI())
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return true;
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}
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return false;
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}
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bool
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ARM64DeadRegisterDefinitions::processMachineBasicBlock(MachineBasicBlock *MBB) {
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bool Changed = false;
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
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++I) {
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MachineInstr *MI = I;
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if (usesFrameIndex(MI)) {
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// We need to skip this instruction because while it appears to have a
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// dead def it uses a frame index which might expand into a multi
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// instruction sequence during EPI
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DEBUG(dbgs() << " Ignoring, operand is frame index\n");
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continue;
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}
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for (int i = 0, e = MI->getDesc().getNumDefs(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.isReg() && MO.isDead() && MO.isDef()) {
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18
test/CodeGen/ARM64/dead-def-frame-index.ll
Normal file
18
test/CodeGen/ARM64/dead-def-frame-index.ll
Normal file
@ -0,0 +1,18 @@
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; RUN: llc -march=arm64 < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios7.0.0"
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; Function Attrs: nounwind ssp uwtable
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define i32 @test1() #0 {
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%tmp1 = alloca i8
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%tmp2 = alloca i32, i32 4096
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%tmp3 = icmp eq i8* %tmp1, null
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%tmp4 = zext i1 %tmp3 to i32
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ret i32 %tmp4
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; CHECK-LABEL: test1
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; CHECK: adds [[TEMP:[a-z0-9]+]], sp, #16384
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; CHECK: adds [[TEMP]], [[TEMP]], #15
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}
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