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Clean up the tests a little, make sure we match an instruction in the right
test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124473 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -695,6 +695,7 @@ define i64 @test50(i32 %a) nounwind {
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; This select instruction can't be eliminated because trying to do so would
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; This select instruction can't be eliminated because trying to do so would
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; change the number of vector elements. This used to assert.
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; change the number of vector elements. This used to assert.
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define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
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define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
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; CHECK: @test51
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%select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp
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%select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp
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; CHECK: select <3 x i1>
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; CHECK: select <3 x i1>
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%tmp2 = bitcast <3 x i16> %select to i48
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%tmp2 = bitcast <3 x i16> %select to i48
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@ -703,15 +704,13 @@ define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
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; PR8575
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; PR8575
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@g = common global i32 0, align 4
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define i32 @test52(i32 %n, i32 %m) nounwind {
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define void @test52(i32 %n, i32 %m) nounwind {
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; CHECK: @test52
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entry:
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%cmp = icmp sgt i32 %n, %m
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%cmp = icmp sgt i32 %n, %m
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%. = select i1 %cmp, i32 1, i32 3
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%. = select i1 %cmp, i32 1, i32 3
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%add = add nsw i32 %., 3
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%add = add nsw i32 %., 3
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%storemerge = select i1 %cmp, i32 %., i32 %add
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%storemerge = select i1 %cmp, i32 %., i32 %add
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; CHECK: select i1 %cmp, i32 1, i32 6
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; CHECK: select i1 %cmp, i32 1, i32 6
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store i32 %storemerge, i32* @g, align 4
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ret i32 %storemerge
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ret void
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}
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}
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