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Another situation where ROTR is cheaper than ROTL.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2008-08-31 01:13:31 +00:00
parent 353dea2f0a
commit 2692d59574
1 changed files with 3 additions and 3 deletions
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6
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2044,10 +2044,10 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) {
if (ConstantSDNode *SUBC =
dyn_cast<ConstantSDNode>(LHSShiftAmt.getOperand(0))) {
if (SUBC->getAPIntValue() == OpSizeInBits) {
if (HasROTL)
return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode();
else
if (HasROTR)
return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).getNode();
else
return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode();
}
}
}