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Remove restriction on NEON alignment values. Some of the NEON ld/st
instructions use different values (e.g., 2-byte or 4-byte alignment). Also fix ARMInstPrinter to print these alignments as bits instead of bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108386 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -519,9 +519,8 @@ namespace ARM_AM {
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//
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// This is stored in two operands [regaddr, align]. The first is the
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// address register. The second operand is the value of the alignment
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// specifier to use or zero if no explicit alignment.
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// Valid alignments are: 0, 8, 16, and 32 bytes, depending on the specific
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// instruction.
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// specifier in bytes or zero if no explicit alignment.
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// Valid alignments depend on the specific instruction.
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//===--------------------------------------------------------------------===//
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// NEON Modified Immediates
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@ -602,12 +602,8 @@ void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op,
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O << "[" << getRegisterName(MO1.getReg());
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if (MO2.getImm()) {
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unsigned Align = MO2.getImm();
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assert((Align == 8 || Align == 16 || Align == 32) &&
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"unexpected NEON load/store alignment");
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Align <<= 3;
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// FIXME: Both darwin as and GNU as violate ARM docs here.
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O << ", :" << Align;
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O << ", :" << (MO2.getImm() << 3);
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}
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O << "]";
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}
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@ -442,7 +442,7 @@ void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum,
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O << "[" << getRegisterName(MO1.getReg());
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if (MO2.getImm()) {
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// FIXME: Both darwin as and GNU as violate ARM docs here.
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O << ", :" << MO2.getImm();
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O << ", :" << (MO2.getImm() << 3);
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}
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O << "]";
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}
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