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[mips] Define function MipsSEDAGToDAGISel::selectAddESubE.
No intended functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177095 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -198,6 +198,26 @@ MipsSEDAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty,
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return std::make_pair(Lo, Hi);
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return std::make_pair(Lo, Hi);
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}
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}
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SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag,
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SDValue CmpLHS, DebugLoc DL,
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SDNode *Node) const {
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unsigned Opc = InFlag.getOpcode(); (void)Opc;
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assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
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(Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
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"(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
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SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
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SDValue LHS = Node->getOperand(0), RHS = Node->getOperand(1);
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EVT VT = LHS.getValueType();
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SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, DL, VT, Ops, 2);
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SDNode *AddCarry = CurDAG->getMachineNode(Mips::ADDu, DL, VT,
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SDValue(Carry, 0), RHS);
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return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS,
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SDValue(AddCarry, 0));
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}
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/// ComplexPattern used on MipsInstrInfo
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/// ComplexPattern used on MipsInstrInfo
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/// Used on Mips Load/Store instructions
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/// Used on Mips Load/Store instructions
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bool MipsSEDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
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bool MipsSEDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
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@ -294,38 +314,15 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::selectNode(SDNode *Node) {
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switch(Opcode) {
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switch(Opcode) {
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default: break;
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default: break;
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case ISD::SUBE:
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case ISD::SUBE: {
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case ISD::ADDE: {
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SDValue InFlag = Node->getOperand(2);
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SDValue InFlag = Node->getOperand(2), CmpLHS;
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Result = selectAddESubE(Mips::SUBu, InFlag, InFlag.getOperand(0), DL, Node);
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unsigned Opc = InFlag.getOpcode(); (void)Opc;
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return std::make_pair(true, Result);
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assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
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(Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
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"(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
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unsigned MOp;
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if (Opcode == ISD::ADDE) {
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CmpLHS = InFlag.getValue(0);
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MOp = Mips::ADDu;
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} else {
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CmpLHS = InFlag.getOperand(0);
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MOp = Mips::SUBu;
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}
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}
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SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
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case ISD::ADDE: {
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SDValue InFlag = Node->getOperand(2);
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SDValue LHS = Node->getOperand(0);
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Result = selectAddESubE(Mips::ADDu, InFlag, InFlag.getValue(0), DL, Node);
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SDValue RHS = Node->getOperand(1);
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EVT VT = LHS.getValueType();
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unsigned Sltu_op = Mips::SLTu;
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SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops, 2);
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unsigned Addu_op = Mips::ADDu;
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SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, DL, VT,
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SDValue(Carry,0), RHS);
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Result = CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS,
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SDValue(AddCarry,0));
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return std::make_pair(true, Result);
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return std::make_pair(true, Result);
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}
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}
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@ -29,6 +29,9 @@ private:
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std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, DebugLoc dl,
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std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, DebugLoc dl,
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EVT Ty, bool HasLo, bool HasHi);
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EVT Ty, bool HasLo, bool HasHi);
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SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
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DebugLoc DL, SDNode *Node) const;
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virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
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virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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SDValue &Offset) const;
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