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Added isLegalAddressExpression(). Only allows X +/- C for now.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-03-16 08:43:56 +00:00
parent 14245a9d62
commit 2770747216
2 changed files with 21 additions and 0 deletions
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15
lib/Target/ARM/ARMISelLowering.cpp
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@@ -22,6 +22,7 @@
#include "ARMTargetMachine.h"
#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/Instruction.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
@@ -1269,6 +1270,20 @@ ARMTargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
// ARM Optimization Hooks
//===----------------------------------------------------------------------===//
/// isLegalAddressExpression - Return true if the binary expression made up of
/// specified opcode, operands, and type can be folded into target addressing
/// mode for load / store of the given type.
bool ARMTargetLowering::isLegalAddressExpression(unsigned Opc, Value *Op0,
Value *Op1, const Type *Ty) const {
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
if (Opc == Instruction::Add)
return isLegalAddressImmediate(Op1C->getSExtValue(), Ty);
if (Opc == Instruction::Sub)
return isLegalAddressImmediate(-Op1C->getSExtValue(), Ty);
}
return false;
}
/// isLegalAddressImmediate - Return true if the integer value can be used
/// as the offset of the target addressing mode for load / store of the
/// given type.