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	Fixed version of optimized integer divide is now fixed. Calculate the
quotient, not the remainder. Also, make sure to remove the old div operand from the ExprMap and let SelectExpr insert the new one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21111 91177308-0d34-0410-b5e6-96231b3b80d8
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		@@ -551,7 +551,7 @@ static unsigned getImmediateForOpcode(SDOperand N, unsigned Opcode,
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    if (v <= -2 || v >= 2) { return 4; }
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					    if (v <= -2 || v >= 2) { return 4; }
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    break;
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					    break;
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  case ISD::UDIV:
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					  case ISD::UDIV:
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    if (v != 0) { return 4; }
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					    if (v > 1) { return 4; }
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    break;
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					    break;
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  }
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					  }
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  return 0;
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					  return 0;
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@@ -711,10 +711,7 @@ SDOperand ISel::BuildSDIVSequence(SDOperand N) {
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  // Extract the sign bit and add it to the quotient
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					  // Extract the sign bit and add it to the quotient
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  SDOperand T = 
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					  SDOperand T = 
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    ISelDAG->getNode(ISD::SRL, MVT::i32, Q, ISelDAG->getConstant(31, MVT::i32));
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					    ISelDAG->getNode(ISD::SRL, MVT::i32, Q, ISelDAG->getConstant(31, MVT::i32));
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  Q = ISelDAG->getNode(ISD::ADD, MVT::i32, Q, T);
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					  return ISelDAG->getNode(ISD::ADD, MVT::i32, Q, T);
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  // Compute the remainder
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  T = ISelDAG->getNode(ISD::MUL, MVT::i32, Q, N.getOperand(1));
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  return ISelDAG->getNode(ISD::SUB, MVT::i32, N.getOperand(0), T);
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}
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					}
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/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
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					/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
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@@ -739,9 +736,7 @@ SDOperand ISel::BuildUDIVSequence(SDOperand N) {
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    Q = ISelDAG->getNode(ISD::SRL, MVT::i32, NPQ, 
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					    Q = ISelDAG->getNode(ISD::SRL, MVT::i32, NPQ, 
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                           ISelDAG->getConstant(magics.s-1, MVT::i32));
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					                           ISelDAG->getConstant(magics.s-1, MVT::i32));
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  }
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					  }
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  // Compute the remainder
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					  return Q;
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  SDOperand T = ISelDAG->getNode(ISD::MUL, MVT::i32, Q, N.getOperand(1));
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  return ISelDAG->getNode(ISD::SUB, MVT::i32, N.getOperand(0), T);
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}
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					}
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/// getGlobalBaseReg - Output the instructions required to put the
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					/// getGlobalBaseReg - Output the instructions required to put the
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@@ -1601,11 +1596,12 @@ unsigned ISel::SelectExpr(SDOperand N) {
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      return Result;
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					      return Result;
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    // If this is a divide by constant, we can emit code using some magic
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					    // If this is a divide by constant, we can emit code using some magic
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    // constants to implement it as a multiply instead.
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					    // constants to implement it as a multiply instead.
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    //case 4:
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					    case 4:
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    //  if (opcode == ISD::SDIV)
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					      ExprMap.erase(N);
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    //    return SelectExpr(BuildSDIVSequence(N));
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					      if (opcode == ISD::SDIV) 
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    //  else
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					        return SelectExpr(BuildSDIVSequence(N));
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    //    return SelectExpr(BuildUDIVSequence(N));
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					      else
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					        return SelectExpr(BuildUDIVSequence(N));
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    }
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					    }
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    Tmp1 = SelectExpr(N.getOperand(0));
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					    Tmp1 = SelectExpr(N.getOperand(0));
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    Tmp2 = SelectExpr(N.getOperand(1));
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					    Tmp2 = SelectExpr(N.getOperand(1));
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