From 27d53ba6dd58543b1a3f5f92be522e0d6d75daf8 Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Fri, 19 Aug 2005 03:42:28 +0000 Subject: [PATCH] Fix a bug where we were passing the wrong number of arguments to an instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelPattern.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 3ca7cd6c610..caf6b3981d0 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -469,7 +469,10 @@ void ISel::MoveCRtoGPR(unsigned CCReg, ISD::CondCode CC, unsigned Result){ BuildMI(BB, PPC::MCRF, 1, PPC::CR7).addReg(CCReg); bool GPOpt = TLI.getTargetMachine().getSubtarget().isGigaProcessor(); - BuildMI(BB, GPOpt ? PPC::MFOCRF : PPC::MFCR, 1, IntCR).addReg(PPC::CR7); + if (GPOpt) + BuildMI(BB, PPC::MFOCRF, 1, IntCR).addReg(PPC::CR7); + else + BuildMI(BB, PPC::MFCR, 0, IntCR); if (Inv) { unsigned Tmp1 = MakeIntReg(); BuildMI(BB, PPC::RLWINM, 4, Tmp1).addReg(IntCR).addImm(32-(3-Idx))