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LegalizeTypes support for fabs on ppc long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53613 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -759,6 +759,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
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case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
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case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
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case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
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case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
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case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
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case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
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@ -799,6 +800,19 @@ void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDOperand &Lo,
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Lo = Call.getOperand(0); Hi = Call.getOperand(1);
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}
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void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDOperand &Lo,
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SDOperand &Hi) {
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assert(N->getValueType(0) == MVT::ppcf128 &&
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"Logic only correct for ppcf128!");
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SDOperand Tmp;
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GetExpandedFloat(N->getOperand(0), Lo, Tmp);
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Hi = DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp);
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// Lo = Hi==fabs(Hi) ? Lo : -Lo;
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Lo = DAG.getNode(ISD::SELECT_CC, Lo.getValueType(), Tmp, Hi, Lo,
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DAG.getNode(ISD::FNEG, Lo.getValueType(), Lo),
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DAG.getCondCode(ISD::SETEQ));
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}
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void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDOperand &Lo,
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SDOperand &Hi) {
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SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
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@ -367,6 +367,7 @@ private:
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// Float Result Expansion.
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void ExpandFloatResult(SDNode *N, unsigned ResNo);
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void ExpandFloatRes_ConstantFP(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandFloatRes_FABS (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandFloatRes_FADD (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandFloatRes_FDIV (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandFloatRes_FMUL (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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19
test/CodeGen/PowerPC/2008-07-15-Fabs.ll
Normal file
19
test/CodeGen/PowerPC/2008-07-15-Fabs.ll
Normal file
@ -0,0 +1,19 @@
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; RUN: llvm-as < %s | llc
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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target triple = "powerpc-apple-darwin9"
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define hidden i256 @__divtc3(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind readnone {
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entry:
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call ppc_fp128 @fabsl( ppc_fp128 %d ) nounwind readnone ; <ppc_fp128>:0 [#uses=1]
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fcmp olt ppc_fp128 0xM00000000000000000000000000000000, %0 ; <i1>:1 [#uses=1]
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%.pn106 = select i1 %1, ppc_fp128 %a, ppc_fp128 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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%.pn = sub ppc_fp128 0xM00000000000000000000000000000000, %.pn106 ; <ppc_fp128> [#uses=1]
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%y.0 = fdiv ppc_fp128 %.pn, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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mul ppc_fp128 %y.0, 0xM3FF00000000000000000000000000000 ; <ppc_fp128>:2 [#uses=1]
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add ppc_fp128 %2, mul (ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000) ; <ppc_fp128>:3 [#uses=1]
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%tmpi = add ppc_fp128 %3, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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store ppc_fp128 %tmpi, ppc_fp128* null, align 16
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ret i256 0
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}
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declare ppc_fp128 @fabsl(ppc_fp128) nounwind readnone
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