6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-03 14:31:10 +00:00
Code Issues Projects Releases Wiki Activity

Stack slot access methods are in TargetInstrInfo.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112653 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-08-31 22:01:07 +00:00
parent dd120f936a
commit 297907f3a0
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
docs/CodeGenerator.html
View File

@ -1457,8 +1457,8 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf,
order to get and store values in memory. To assign a physical register to a order to get and store values in memory. To assign a physical register to a
virtual register present in a given operand, virtual register present in a given operand,
use <tt>MachineOperand::setReg(p_reg)</tt>. To insert a store instruction, use <tt>MachineOperand::setReg(p_reg)</tt>. To insert a store instruction,
use <tt>TargetRegisterInfo::storeRegToStackSlot(...)</tt>, and to insert a use <tt>TargetInstrInfo::storeRegToStackSlot(...)</tt>, and to insert a
load instruction, use <tt>TargetRegisterInfo::loadRegFromStackSlot</tt>.</p> load instruction, use <tt>TargetInstrInfo::loadRegFromStackSlot</tt>.</p>
<p>The indirect mapping shields the application developer from the complexities <p>The indirect mapping shields the application developer from the complexities
of inserting load and store instructions. In order to map a virtual register of inserting load and store instructions. In order to map a virtual register