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https://github.com/c64scene-ar/llvm-6502.git
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[X86] Break false dependencies before partial register updates when the source operand is in memory
Adds the various "rm" instruction variants into the list of instructions that have a partial register update. Also adds all variants of SQRTSD that were missing in the original list. Differential Revision: http://reviews.llvm.org/D6620 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224246 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Kuperstein
parent
4dcffed444
commit
299e0d4c24
@ -4379,23 +4379,43 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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static bool hasPartialRegUpdate(unsigned Opcode) {
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switch (Opcode) {
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case X86::CVTSI2SSrr:
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case X86::CVTSI2SSrm:
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case X86::CVTSI2SS64rr:
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case X86::CVTSI2SS64rm:
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case X86::CVTSI2SDrr:
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case X86::CVTSI2SDrm:
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case X86::CVTSI2SD64rr:
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case X86::CVTSI2SD64rm:
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case X86::CVTSD2SSrr:
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case X86::CVTSD2SSrm:
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case X86::Int_CVTSD2SSrr:
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case X86::Int_CVTSD2SSrm:
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case X86::CVTSS2SDrr:
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case X86::CVTSS2SDrm:
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case X86::Int_CVTSS2SDrr:
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case X86::Int_CVTSS2SDrm:
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case X86::RCPSSr:
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case X86::RCPSSm:
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case X86::RCPSSr_Int:
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case X86::RCPSSm_Int:
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case X86::ROUNDSDr:
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case X86::ROUNDSDm:
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case X86::ROUNDSDr_Int:
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case X86::ROUNDSSr:
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case X86::ROUNDSSm:
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case X86::ROUNDSSr_Int:
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case X86::RSQRTSSr:
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case X86::RSQRTSSm:
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case X86::RSQRTSSr_Int:
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case X86::RSQRTSSm_Int:
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case X86::SQRTSSr:
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case X86::SQRTSSm:
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case X86::SQRTSSr_Int:
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case X86::SQRTSSm_Int:
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case X86::SQRTSDr:
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case X86::SQRTSDm:
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case X86::SQRTSDr_Int:
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case X86::SQRTSDm_Int:
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return true;
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}
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@ -34,7 +34,8 @@ entry:
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define double @squirt(double* %x) nounwind {
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entry:
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; CHECK-LABEL: squirt:
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; CHECK: sqrtsd ([[A0]]), %xmm0
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; CHECK: movsd ([[A0]]), %xmm0
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; CHECK: sqrtsd %xmm0, %xmm0
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%z = load double* %x
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%t = call double @llvm.sqrt.f64(double %z)
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ret double %t
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@ -60,3 +61,101 @@ entry:
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declare float @llvm.sqrt.f32(float)
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declare double @llvm.sqrt.f64(double)
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; CHECK-LABEL: loopdep1
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; CHECK: for.body
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;
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; This loop contains two cvtsi2ss instructions that update the same xmm
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; register. Verify that the execution dependency fix pass breaks those
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; dependencies by inserting xorps instructions.
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;
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; If the register allocator chooses different registers for the two cvtsi2ss
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; instructions, they are still dependent on themselves.
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; CHECK: xorps [[XMM1:%xmm[0-9]+]]
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; CHECK: , [[XMM1]]
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; CHECK: cvtsi2ssl %{{.*}}, [[XMM1]]
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; CHECK: xorps [[XMM2:%xmm[0-9]+]]
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; CHECK: , [[XMM2]]
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; CHECK: cvtsi2ssl %{{.*}}, [[XMM2]]
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;
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define float @loopdep1(i32 %m) nounwind uwtable readnone ssp {
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entry:
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%tobool3 = icmp eq i32 %m, 0
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br i1 %tobool3, label %for.end, label %for.body
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for.body: ; preds = %entry, %for.body
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%m.addr.07 = phi i32 [ %dec, %for.body ], [ %m, %entry ]
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%s1.06 = phi float [ %add, %for.body ], [ 0.000000e+00, %entry ]
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%s2.05 = phi float [ %add2, %for.body ], [ 0.000000e+00, %entry ]
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%n.04 = phi i32 [ %inc, %for.body ], [ 1, %entry ]
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%conv = sitofp i32 %n.04 to float
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%add = fadd float %s1.06, %conv
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%conv1 = sitofp i32 %m.addr.07 to float
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%add2 = fadd float %s2.05, %conv1
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%inc = add nsw i32 %n.04, 1
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%dec = add nsw i32 %m.addr.07, -1
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%tobool = icmp eq i32 %dec, 0
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br i1 %tobool, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%s1.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]
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%s2.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add2, %for.body ]
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%sub = fsub float %s1.0.lcssa, %s2.0.lcssa
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ret float %sub
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}
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; This loop contains a cvtsi2sd instruction that has a loop-carried
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; false dependency on an xmm that is modified by other scalar instructions
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; that follow it in the loop. Additionally, the source of convert is a
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; memory operand. Verify the execution dependency fix pass breaks this
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; dependency by inserting a xor before the convert.
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@x = common global [1024 x double] zeroinitializer, align 16
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@y = common global [1024 x double] zeroinitializer, align 16
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@z = common global [1024 x double] zeroinitializer, align 16
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@w = common global [1024 x double] zeroinitializer, align 16
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@v = common global [1024 x i32] zeroinitializer, align 16
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define void @loopdep2() {
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entry:
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br label %for.cond1.preheader
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for.cond1.preheader: ; preds = %for.inc14, %entry
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%i.025 = phi i32 [ 0, %entry ], [ %inc15, %for.inc14 ]
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br label %for.body3
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for.body3:
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%indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
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%arrayidx = getelementptr inbounds [1024 x i32]* @v, i64 0, i64 %indvars.iv
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%0 = load i32* %arrayidx, align 4
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%conv = sitofp i32 %0 to double
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%arrayidx5 = getelementptr inbounds [1024 x double]* @x, i64 0, i64 %indvars.iv
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%1 = load double* %arrayidx5, align 8
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%mul = fmul double %conv, %1
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%arrayidx7 = getelementptr inbounds [1024 x double]* @y, i64 0, i64 %indvars.iv
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%2 = load double* %arrayidx7, align 8
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%mul8 = fmul double %mul, %2
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%arrayidx10 = getelementptr inbounds [1024 x double]* @z, i64 0, i64 %indvars.iv
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%3 = load double* %arrayidx10, align 8
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%mul11 = fmul double %mul8, %3
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%arrayidx13 = getelementptr inbounds [1024 x double]* @w, i64 0, i64 %indvars.iv
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store double %mul11, double* %arrayidx13, align 8
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1024
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br i1 %exitcond, label %for.inc14, label %for.body3
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for.inc14: ; preds = %for.body3
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%inc15 = add nsw i32 %i.025, 1
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%exitcond26 = icmp eq i32 %inc15, 100000
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br i1 %exitcond26, label %for.end16, label %for.cond1.preheader
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for.end16: ; preds = %for.inc14
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ret void
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;CHECK-LABEL:@loopdep2
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;CHECK: xorps [[XMM0:%xmm[0-9]+]], [[XMM0]]
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;CHECK-NEXT: cvtsi2sdl {{.*}}, [[XMM0]]
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;CHECK-NEXT: mulsd {{.*}}, [[XMM0]]
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;CHECK-NEXT: mulsd {{.*}}, [[XMM0]]
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;CHECK-NEXT: mulsd {{.*}}, [[XMM0]]
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;CHECK-NEXT: movsd [[XMM0]],
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}
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@ -43,45 +43,3 @@ while.body:
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while.end:
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ret void
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}
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; CHECK: f2
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; CHECK: for.body
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;
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; This loop contains two cvtsi2ss instructions that update the same xmm
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; register. Verify that the execution dependency fix pass breaks those
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; dependencies by inserting xorps instructions.
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;
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; If the register allocator chooses different registers for the two cvtsi2ss
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; instructions, they are still dependent on themselves.
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; CHECK: xorps [[XMM1:%xmm[0-9]+]]
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; CHECK: , [[XMM1]]
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; CHECK: cvtsi2ssl %{{.*}}, [[XMM1]]
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; CHECK: xorps [[XMM2:%xmm[0-9]+]]
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; CHECK: , [[XMM2]]
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; CHECK: cvtsi2ssl %{{.*}}, [[XMM2]]
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;
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define float @f2(i32 %m) nounwind uwtable readnone ssp {
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entry:
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%tobool3 = icmp eq i32 %m, 0
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br i1 %tobool3, label %for.end, label %for.body
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for.body: ; preds = %entry, %for.body
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%m.addr.07 = phi i32 [ %dec, %for.body ], [ %m, %entry ]
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%s1.06 = phi float [ %add, %for.body ], [ 0.000000e+00, %entry ]
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%s2.05 = phi float [ %add2, %for.body ], [ 0.000000e+00, %entry ]
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%n.04 = phi i32 [ %inc, %for.body ], [ 1, %entry ]
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%conv = sitofp i32 %n.04 to float
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%add = fadd float %s1.06, %conv
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%conv1 = sitofp i32 %m.addr.07 to float
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%add2 = fadd float %s2.05, %conv1
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%inc = add nsw i32 %n.04, 1
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%dec = add nsw i32 %m.addr.07, -1
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%tobool = icmp eq i32 %dec, 0
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br i1 %tobool, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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%s1.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]
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%s2.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add2, %for.body ]
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%sub = fsub float %s1.0.lcssa, %s2.0.lcssa
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ret float %sub
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}
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