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[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg

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retval.  Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
2012-05-11 18:51:55 +00:00
parent 12c807873a
commit 2a2e9d54e9
2 changed files with 38 additions and 4 deletions
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25
lib/Target/ARM/ARMFastISel.cpp
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@@ -2014,7 +2014,8 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
// Finally update the result. // Finally update the result.
UpdateValueMap(I, ResultReg); UpdateValueMap(I, ResultReg);
} else if (RVLocs.size() == 1) { } else {
assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!");
EVT CopyVT = RVLocs[0].getValVT(); EVT CopyVT = RVLocs[0].getValVT();
// Special handling for extended integers. // Special handling for extended integers.
@@ -2030,9 +2031,6 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
// Finally update the result. // Finally update the result.
UpdateValueMap(I, ResultReg); UpdateValueMap(I, ResultReg);
} else {
// Can't handle non-double multi-reg retvals.
return false;
} }
} }
@@ -2144,6 +2142,15 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) {
// TODO: For now if we have long calls specified we don't handle the call. // TODO: For now if we have long calls specified we don't handle the call.
if (EnableARMLongCalls) return false; if (EnableARMLongCalls) return false;
// Can't handle non-double multi-reg retvals.
if (RetVT != MVT::isVoid && RetVT != MVT::i32) {
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context);
CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
if (RVLocs.size() >= 2 && RetVT != MVT::f64)
return false;
}
// Set up the argument vectors. // Set up the argument vectors.
SmallVector<Value*, 8> Args; SmallVector<Value*, 8> Args;
SmallVector<unsigned, 8> ArgRegs; SmallVector<unsigned, 8> ArgRegs;
@@ -2247,6 +2254,16 @@ bool ARMFastISel::SelectCall(const Instruction *I,
// TODO: For now if we have long calls specified we don't handle the call. // TODO: For now if we have long calls specified we don't handle the call.
if (EnableARMLongCalls) return false; if (EnableARMLongCalls) return false;
// Can't handle non-double multi-reg retvals.
if (RetVT != MVT::isVoid && RetVT != MVT::i1 && RetVT != MVT::i8 &&
RetVT != MVT::i16 && RetVT != MVT::i32) {
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context);
CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
if (RVLocs.size() >= 2 && RetVT != MVT::f64)
return false;
}
// Set up the argument vectors. // Set up the argument vectors.
SmallVector<Value*, 8> Args; SmallVector<Value*, 8> Args;
SmallVector<unsigned, 8> ArgRegs; SmallVector<unsigned, 8> ArgRegs;

17
test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll Normal file
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@@ -0,0 +1,17 @@
; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
; Fast-isel can't handle non-double multi-reg retvals.
; This test just check to make sure we don't hit the assert in FinishCall.
define <16 x i8> @foo() nounwind ssp {
entry:
ret <16 x i8> zeroinitializer
}
define void @t1() nounwind ssp {
entry:
; ARM: @t1
; THUMB: @t1
%call = call <16 x i8> @foo()
ret void
}