mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-08 03:30:22 +00:00
Fix merge problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81658 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
20c35ec427
commit
2a52122b30
@ -347,13 +347,6 @@ def QPR_VFP2 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
|
||||
let SubRegClassList = [SPR, SPR, SPR, SPR, DPR_VFP2, DPR_VFP2];
|
||||
}
|
||||
|
||||
// Subset of QPR that have 32-bit SPR subregs.
|
||||
def QPR_VFP2 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
|
||||
128,
|
||||
[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]> {
|
||||
let SubRegClassList = [SPR, SPR, SPR, SPR, DPR, DPR];
|
||||
}
|
||||
|
||||
// Condition code registers.
|
||||
def CCR : RegisterClass<"ARM", [i32], 32, [CPSR]>;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user