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ARM: yet another round of ARM test clean ups

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205586 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Saleem Abdulrasool 2014-04-03 23:47:24 +00:00
parent 91ba0a9f61
commit 2abadea537
108 changed files with 190 additions and 143 deletions
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2
test/CodeGen/ARM/2013-05-07-ByteLoadSameAddress.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+v7,+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mattr=+v7,+thumb2 %s -o - | FileCheck %s
define i8 @f1(i8* %call1, i8* %call3, i32 %h, i32 %w, i32 %Width) {
; CHECK: f1:

2
test/CodeGen/ARM/misched-copy-arm.ll
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@ -1,5 +1,5 @@
; REQUIRES: asserts
; RUN: llc < %s -march=thumb -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=misched %s -o - 2>&1 | FileCheck %s
;
; Loop counter copies should be eliminated.
; There is also a MUL here, but we don't care where it is scheduled.

2
test/CodeGen/ARM/t2-imm.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f6(i32 %a) {
; CHECK:f6

4
test/CodeGen/ARM/thumb2-it-block.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; RUN: llc -mtriple=thumbv8 %s -o - | FileCheck %s
; PR11107
define i32 @test(i32 %a, i32 %b) {

4
test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb | grep r0 | count 1
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @a(i32 %x, i32 %y) nounwind readnone {
entry:
@ -6,3 +6,5 @@ entry:
ret i32 %mul
}
; CHECK: r0

2
test/CodeGen/Thumb/2010-06-18-SibCallCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -march=thumb < %s
; RUN: llc -mtriple=thumb-eabi %s -o /dev/null
; rdar://8104457
define arm_apcscc void @t(i32* %m) nounwind {

2
test/CodeGen/Thumb/DbgValueOtherTargets.test
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@ -1 +1 @@
RUN: llc -O0 -march=thumb -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
RUN: llc -O0 -mtriple=thumb-eabi -asm-verbose %S/../Inputs/DbgValueOtherTargets.ll -o - | FileCheck %S/../Inputs/DbgValueOtherTargets.ll

6
test/CodeGen/Thumb/barrier.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=V6
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6
; RUN: llc < %s -march=thumb -mcpu=cortex-m0 | FileCheck %s -check-prefix=V6M
; RUN: llc -mtriple=thumbv6-apple-darwin %s -o - | FileCheck %s -check-prefix=V6
; RUN: llc -mtriple=thumbv7-apple-darwin -mattr=-db %s -o - | FileCheck %s -check-prefix=V6
; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m0 %s -o - | FileCheck %s -check-prefix=V6M
define void @t1() {
; V6-LABEL: t1:

2
test/CodeGen/Thumb/fpconv.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb
; RUN: llc -mtriple=thumb-eabi %s -o /dev/null
define float @f1(double %x) {
entry:

2
test/CodeGen/Thumb/fpow.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb
; RUN: llc -mtriple=thumb-eabi %s -o /dev/null
define double @t(double %x, double %y) nounwind optsize {
entry:

2
test/CodeGen/Thumb/inlineasm-imm-thumb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -no-integrated-as
; RUN: llc -mtriple=thumb-eabi -no-integrated-as %s -o /dev/null
; Test Thumb-mode "I" constraint, for ADD immediate.
define i32 @testI(i32 %x) {

3
test/CodeGen/Thumb/inlineasm-thumb.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=thumb | FileCheck %s
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @t1(i32 %x, i32 %y) nounwind {
entry:
; CHECK: mov r0, r12

2
test/CodeGen/Thumb/ispositive.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb | FileCheck %s
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @test1(i32 %X) {
entry:

4
test/CodeGen/Thumb/ldr_ext.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=V5
; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s -check-prefix=V6
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=V5
; RUN: llc -mtriple=thumb-eabi -mattr=+v6 %s -o - | FileCheck %s -check-prefix=V6
; rdar://7176514

2
test/CodeGen/Thumb/ldr_frame.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb | FileCheck %s
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @f1() {
; CHECK-LABEL: f1:

9
test/CodeGen/Thumb/long-setcc.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -march=thumb | grep cmp | count 1
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i1 @t1(i64 %x) {
%B = icmp slt i64 %x, 0
@ -15,3 +14,9 @@ define i1 @t3(i32 %x) {
%tmp = icmp ugt i32 %x, -1
ret i1 %tmp
}
; CHECK: cmp
; CHECK-NOT: cmp

20
test/CodeGen/Thumb/long.ll
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@ -1,10 +1,5 @@
; RUN: llc < %s -march=thumb | \
; RUN: grep mvn | count 1
; RUN: llc < %s -march=thumb | \
; RUN: grep adc | count 1
; RUN: llc < %s -march=thumb | \
; RUN: grep sbc | count 1
; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __muldi3
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
; RUN: llc -mtriple=thumb-apple-darwin %s -o - | FileCheck %s -check-prefix CHECK-DARWIN
define i64 @f1() {
entry:
@ -74,3 +69,14 @@ entry:
ret i64 %retval
}
; CHECK: mvn
; CHECK-NOT: mvn
; CHECK: adc
; CHECK-NOT: adc
; CHECK: sbc
; CHECK-NOT: sbc
; CHECK-DARWIN: __muldi3

2
test/CodeGen/Thumb/long_shift.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb
; RUN: llc -mtriple=thumb-eabi %s -o /dev/null
define i64 @f0(i64 %A, i64 %B) {
%tmp = bitcast i64 %A to i64

14
test/CodeGen/Thumb/mul.ll
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@ -1,22 +1,32 @@
; RUN: llc < %s -march=thumb | grep mul | count 3
; RUN: llc < %s -march=thumb | grep lsl | count 1
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @f1(i32 %u) {
%tmp = mul i32 %u, %u
ret i32 %tmp
}
; CHECK: mul{{s?}}
define i32 @f2(i32 %u, i32 %v) {
%tmp = mul i32 %u, %v
ret i32 %tmp
}
; CHECK: mul{{s?}}
define i32 @f3(i32 %u) {
%tmp = mul i32 %u, 5
ret i32 %tmp
}
; CHECK: mul{{s?}}
define i32 @f4(i32 %u) {
%tmp = mul i32 %u, 4
ret i32 %tmp
}
; CHECK: lsl
; CHECK-NOT: mul{{s?}}
; CHECK-NOT: lsl

2
test/CodeGen/Thumb/rev.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mattr=+v6 %s -o - | FileCheck %s
define i32 @test1(i32 %X) nounwind {
; CHECK: test1

2
test/CodeGen/Thumb/stack-coloring-without-frame-ptr.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1022e
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1022e %s -o /dev/null
%iterator = type { i8**, i8**, i8**, i8*** }
%insert_iterator = type { %deque*, %iterator }

5
test/CodeGen/Thumb/stack-frame.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -march=thumb
; RUN: llc < %s -march=thumb | grep add | count 1
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define void @f1() {
%c = alloca i8, align 1
@ -10,4 +9,6 @@ define i32 @f2() {
ret i32 1
}
; CHECK: add
; CHECK-NOT: add

6
test/CodeGen/Thumb/thumb-imm.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -march=thumb | not grep CPI
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @test1() {
ret i32 1000
@ -8,3 +7,6 @@ define i32 @test1() {
define i32 @test2() {
ret i32 -256
}
; CHECK-NOT: CPI

2
test/CodeGen/Thumb/trap.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb | FileCheck %s
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
; rdar://7961298
define void @t() nounwind {

5
test/CodeGen/Thumb/tst_teq.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb | grep tst
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s
define i32 @f(i32 %a) {
entry:
@ -15,3 +15,6 @@ entry:
%retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
ret i32 %retval
}
; CHECK: tst

11
test/CodeGen/Thumb/vargs.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=thumb
; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 2
; RUN: llc < %s -mtriple=thumb-darwin | grep pop | count 2
; RUN: llc -mtriple=thumb-eabi %s -o /dev/null
; RUN: llc -mtriple=thumb-linux %s -o - | FileCheck %s
; RUN: llc -mtriple=thumb-darwin %s -o - | FileCheck %s
@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
@ -34,3 +34,8 @@ declare void @llvm.va_start(i8*)
declare i32 @printf(i8*, ...)
declare void @llvm.va_end(i8*)
; CHECK: pop
; CHECK: pop
; CHECK-NOT: pop

2
test/CodeGen/Thumb2/bfi.ll
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@ -1,4 +1,4 @@
; RUN: llc -march=thumb -mattr=+v6t2 < %s | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mattr=+v6t2 %s -o - | FileCheck %s
%struct.F = type { [3 x i8], i8 }

2
test/CodeGen/Thumb2/bfx.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @sbfx1(i32 %a) {
; CHECK: sbfx1

2
test/CodeGen/Thumb2/carry.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
entry:

8
test/CodeGen/Thumb2/div.ll
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@ -1,10 +1,10 @@
; RUN: llc < %s -mtriple=thumb-apple-darwin -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: llc -mtriple=thumb-apple-darwin -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
; RUN: | FileCheck %s -check-prefix=CHECK-THUMB
; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \
; RUN: llc -mtriple=thumb-apple-darwin -mcpu=cortex-m3 -mattr=+thumb2 %s -o - \
; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M
; RUN: llc < %s -march=thumb -mcpu=swift \
; RUN: llc -mtriple=thumb-apple-darwin -mcpu=swift %s -o - \
; RUN: | FileCheck %s -check-prefix=CHECK-HWDIV
; RUN: llc < %s -march=thumb -mcpu=cortex-r5 \
; RUN: llc -mtriple=thumb-apple-darwin -mcpu=cortex-r5 %s -o - \
; RUN: | FileCheck %s -check-prefix=CHECK-HWDIV
define i32 @f1(i32 %a, i32 %b) {

2
test/CodeGen/Thumb2/ifcvt-neon.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s
; rdar://7368193
@a = common global float 0.000000e+00 ; <float*> [#uses=2]

2
test/CodeGen/Thumb2/longMACt.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; Check generated signed and unsigned multiply accumulate long.
define i64 @MACLongTest1(i32 %a, i32 %b, i64 %c) {

2
test/CodeGen/Thumb2/mul_const.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; rdar://7069502
define i32 @t1(i32 %v) nounwind readnone {

2
test/CodeGen/Thumb2/thumb2-adc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 734439407618 = 0x000000ab00000002
define i64 @f1(i64 %a) {

2
test/CodeGen/Thumb2/thumb2-add.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @t2ADDrc_255(i32 %lhs) {
; CHECK-LABEL: t2ADDrc_255:

2
test/CodeGen/Thumb2/thumb2-add2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-add3.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
%tmp = add i32 %a, 4095

2
test/CodeGen/Thumb2/thumb2-add4.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 171 = 0x000000ab
define i64 @f1(i64 %a) {

2
test/CodeGen/Thumb2/thumb2-add5.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-add6.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-and.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-and2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-asr.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-asr2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-bcc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; If-conversion defeats the purpose of this test, which is to check CBZ
; generation, so use memory barrier instruction to make sure it doesn't
; happen and we get actual branches.

2
test/CodeGen/Thumb2/thumb2-bfc.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 4278190095 = 0xff00000f
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-bic.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-clz.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+v7 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+v7 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-cmn.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; These tests could be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-cmn2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; -0x000000bb = 4294967109
define i1 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-cmp.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-cmp2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; These tests would be improved by 'movs r0, #0' being rematerialized below the
; test as 'mov.w r0, #0'.

2
test/CodeGen/Thumb2/thumb2-eor.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-eor2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-jtb.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 -arm-adjust-jump-tables=0 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 -arm-adjust-jump-tables=0 %s -o - | FileCheck %s
; Do not use tbb / tbh if any destination is before the jumptable.
; rdar://7102917

2
test/CodeGen/Thumb2/thumb2-ldr.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32* %v) {
entry:

18
test/CodeGen/Thumb2/thumb2-ldr_ext.ll
View File

@ -1,7 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrb | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrh | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrsb | count 1
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrsh | count 1
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @test1(i8* %v.pntr.s0.u1) {
%tmp.u = load i8* %v.pntr.s0.u1
@ -26,3 +23,16 @@ define i32 @test4() {
%tmp1.s = sext i16 %tmp.s to i32
ret i32 %tmp1.s
}
; CHECK: ldrb
; CHECK-NOT: ldrb
; CHECK: ldrh
; CHECK-NOT: ldrh
; CHECK: ldrsb
; CHECK-NOT: ldrsb
; CHECK: ldrsh
; CHECK-NOT: ldrsh

2
test/CodeGen/Thumb2/thumb2-ldr_post.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @test(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b ; <i32> [#uses=2]

12
test/CodeGen/Thumb2/thumb2-ldr_pre.ll
View File

@ -1,7 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | \
; RUN: grep "ldr.*\!" | count 3
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | \
; RUN: grep "ldrsb.*\!" | count 1
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32* @test1(i32* %X, i32* %dest) {
%Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
@ -10,6 +7,8 @@ define i32* @test1(i32* %X, i32* %dest) {
ret i32* %Y
}
; CHECK: ldr{{.*}}!
define i32 @test2(i32 %a, i32 %b) {
%tmp1 = sub i32 %a, 64 ; <i32> [#uses=2]
%tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
@ -19,6 +18,8 @@ define i32 @test2(i32 %a, i32 %b) {
ret i32 %tmp5
}
; CHECK: ldr{{.*}}!
define i8* @test3(i8* %X, i32* %dest) {
%tmp1 = getelementptr i8* %X, i32 4
%tmp2 = load i8* %tmp1
@ -26,3 +27,6 @@ define i8* @test3(i8* %X, i32* %dest) {
store i32 %tmp3, i32* %dest
ret i8* %tmp1
}
; CHECK: ldrsb{{.*}}!

2
test/CodeGen/Thumb2/thumb2-ldrb.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i8 @f1(i8* %v) {
entry:

2
test/CodeGen/Thumb2/thumb2-ldrh.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i16 @f1(i16* %v) {
entry:

2
test/CodeGen/Thumb2/thumb2-lsl.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsl2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsr.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsr2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-lsr3.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i1 @test1(i64 %poscnt, i32 %work) {
entry:

6
test/CodeGen/Thumb2/thumb2-mla.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: -arm-use-mulops=false | FileCheck %s -check-prefix=NO_MULOPS
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 \
; RUN: -arm-use-mulops=false %s -o - | FileCheck %s -check-prefix=NO_MULOPS
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b

2
test/CodeGen/Thumb2/thumb2-mls.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
%tmp1 = mul i32 %a, %b

2
test/CodeGen/Thumb2/thumb2-mov.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; Test #<const>

2
test/CodeGen/Thumb2/thumb2-mul.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-mulhi.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2dsp | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2dsp %s -o - | FileCheck %s
define i32 @smulhi(i32 %x, i32 %y) {
; CHECK: smulhi

2
test/CodeGen/Thumb2/thumb2-mvn.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
; RUN: llc -mtriple=thumbv7-apple-darwin %s -o - | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-mvn2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-neg.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

3
test/CodeGen/Thumb2/thumb2-orn.ll
View File

@ -1,5 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
%tmp = xor i32 %b, 4294967295

3
test/CodeGen/Thumb2/thumb2-orn2.ll
View File

@ -1,5 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-orr.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

3
test/CodeGen/Thumb2/thumb2-orr2.ll
View File

@ -1,5 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 0x000000bb = 187
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-pack.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk %s -o - | FileCheck %s
; CHECK: test1
; CHECK: pkhbt r0, r0, r1, lsl #16

2
test/CodeGen/Thumb2/thumb2-rev.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+v7,+t2xtpk %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:

4
test/CodeGen/Thumb2/thumb2-ror.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=THUMB1
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=THUMB1
; CHECK-LABEL: f1:
; CHECK: ror.w r0, r0, #22

2
test/CodeGen/Thumb2/thumb2-rsb.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5

2
test/CodeGen/Thumb2/thumb2-rsb2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-sbc.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 < %s | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {
; CHECK: f1

2
test/CodeGen/Thumb2/thumb2-select_xform.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK: t1

4
test/CodeGen/Thumb2/thumb2-shifter.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 | FileCheck %s --check-prefix=A8
; RUN: llc < %s -march=thumb -mcpu=swift | FileCheck %s --check-prefix=SWIFT
; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s --check-prefix=A8
; RUN: llc -mtriple=thumb-eabi -mcpu=swift %s -o - | FileCheck %s --check-prefix=SWIFT
; rdar://12892707

4
test/CodeGen/Thumb2/thumb2-smla.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp -arm-use-mulops=false | FileCheck %s -check-prefix=NO_MULOPS
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp %s -o - | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp -arm-use-mulops=false %s -o - | FileCheck %s -check-prefix=NO_MULOPS
define i32 @f3(i32 %a, i16 %x, i32 %y) {
; CHECK: f3

2
test/CodeGen/Thumb2/thumb2-smul.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+t2dsp %s -o - | FileCheck %s
@x = weak global i16 0 ; <i16*> [#uses=1]
@y = weak global i16 0 ; <i16*> [#uses=0]

2
test/CodeGen/Thumb2/thumb2-str.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32* %v) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-str_post.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i16 @test1(i32* %X, i16* %A) {
; CHECK-LABEL: test1:

2
test/CodeGen/Thumb2/thumb2-str_pre.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define void @test1(i32* %X, i32* %A, i32** %dest) {
; CHECK: test1

2
test/CodeGen/Thumb2/thumb2-strb.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i8 @f1(i8 %a, i8* %v) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-strh.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i16 @f1(i16 %a, i16* %v) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-sub.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {

2
test/CodeGen/Thumb2/thumb2-sub2.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a) {
%tmp = sub i32 %a, 4095

2
test/CodeGen/Thumb2/thumb2-sub3.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 < %s | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
; 171 = 0x000000ab
define i64 @f1(i64 %a) {

2
test/CodeGen/Thumb2/thumb2-sub4.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:

2
test/CodeGen/Thumb2/thumb2-sub5.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+32bit \
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+32bit %s -o - \
; RUN: | FileCheck %s
define i64 @f1(i64 %a, i64 %b) {

2
test/CodeGen/Thumb2/thumb2-sxt-uxt.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=thumb -mcpu=cortex-m3 | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s
define i32 @test1(i16 zeroext %z) nounwind {
; CHECK-LABEL: test1:

3
test/CodeGen/Thumb2/thumb2-sxt_rot.ll
View File

@ -1,4 +1,5 @@
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk | FileCheck %s
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk %s -o - \
; RUN: | FileCheck %s
define i32 @test0(i8 %A) {
; CHECK: test0

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