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Generalize the fixup info for ARM mode.

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We don't (yet) have the granularity in the fixups to be specific about which
bitranges are affected. That's a future cleanup, but we're not there yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-11-16 22:48:37 +00:00
parent 47a906ac23
commit 2abba8496c
2 changed files with 4 additions and 4 deletions
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4
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
View File

@ -60,7 +60,7 @@ public:
// ARMFixupKinds.h.
//
// Name Offset (bits) Size (bits) Flags
{ "fixup_arm_ldst_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_t2_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel |
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
{ "fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
@ -68,7 +68,7 @@ public:
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
{ "fixup_thumb_adr_pcrel_10",0, 8, MCFixupKindInfo::FKF_IsPCRel |
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
{ "fixup_arm_adr_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_t2_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel |
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
{ "fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel },

4
test/MC/ARM/basic-arm-instructions.s
View File

@ -133,9 +133,9 @@ Lforward:
adr r2, #-3
@ CHECK: Lback:
@ CHECK: adr r2, Lback @ encoding: [0bAAAAAAA0,0x20'A',0x0f'A',0b1110001A]
@ CHECK: adr r2, Lback @ encoding: [A,0x20'A',0x0f'A',0xe2'A']
@ CHECK: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12
@ CHECK: adr r3, Lforward @ encoding: [0bAAAAAAA0,0x30'A',0x0f'A',0b1110001A]
@ CHECK: adr r3, Lforward @ encoding: [A,0x30'A',0x0f'A',0xe2'A']
@ CHECK: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12
@ CHECK: Lforward:
@ CHECK: adr r2, #3 @ encoding: [0x03,0x20,0x8f,0xe2]