From 2b42ff6fdbe07b5c9bbc2831e28f3ff4529eb64f Mon Sep 17 00:00:00 2001 From: Saleem Abdulrasool Date: Tue, 11 Mar 2014 15:09:49 +0000 Subject: [PATCH] ARM: remove ancient -arm-tail-calls option This option is from 2010, designed to work around a linker issue on Darwin for ARM. According to grosbach this is no longer an issue and this option can safely be removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203576 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMISelLowering.cpp | 10 ++-------- test/CodeGen/ARM/2011-06-09-TailCallByVal.ll | 2 +- test/CodeGen/ARM/2011-06-16-TailCallByVal.ll | 4 ++-- test/CodeGen/ARM/call-tc.ll | 6 +++--- test/CodeGen/ARM/fast-tail-call.ll | 2 +- test/CodeGen/ARM/returned-ext.ll | 4 ++-- test/CodeGen/ARM/returned-trunc-tail-calls.ll | 2 +- test/CodeGen/ARM/this-return.ll | 4 ++-- 8 files changed, 14 insertions(+), 20 deletions(-) diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 74f0ac539ed..8f646deb266 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -55,12 +55,6 @@ STATISTIC(NumTailCalls, "Number of tail calls"); STATISTIC(NumMovwMovt, "Number of GAs materialized with movw + movt"); STATISTIC(NumLoopByVals, "Number of loops generated for byval arguments"); -// This option should go away when tail calls fully work. -static cl::opt -EnableARMTailCalls("arm-tail-calls", cl::Hidden, - cl::desc("Generate tail calls (TEMPORARY OPTION)."), - cl::init(false)); - cl::opt EnableARMLongCalls("arm-long-calls", cl::Hidden, cl::desc("Generate calls via indirect call instructions"), @@ -1446,7 +1440,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, bool isThisReturn = false; bool isSibCall = false; // Disable tail calls if they're not supported. - if (!EnableARMTailCalls && !Subtarget->supportsTailCall()) + if (!Subtarget->supportsTailCall()) isTailCall = false; if (isTailCall) { // Check if it's really possible to do a tail call. @@ -2276,7 +2270,7 @@ bool ARMTargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const { } bool ARMTargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const { - if (!EnableARMTailCalls && !Subtarget->supportsTailCall()) + if (!Subtarget->supportsTailCall()) return false; if (!CI->isTailCall()) diff --git a/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll b/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll index 7f0f795486f..12cdd04b7bb 100644 --- a/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll +++ b/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=pic -mcpu=cortex-a8 -arm-tail-calls=1 | FileCheck %s +; RUN: llc < %s -relocation-model=pic -mcpu=cortex-a8 | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" diff --git a/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll b/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll index 101a91396eb..d93cc57574b 100644 --- a/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll +++ b/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll @@ -1,11 +1,11 @@ -; RUN: llc < %s -arm-tail-calls=1 | FileCheck %s +; RUN: llc < %s | FileCheck %s ; tail call inside a function where byval argument is splitted between ; registers and stack is currently unsupported. ; XFAIL: * target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" -target triple = "thumbv7-apple-ios" +target triple = "thumbv7-apple-ios5.0" %struct.A = type <{ i16, i16, i32, i16, i16, i32, i16, [8 x %struct.B], [418 x i8], %struct.C }> %struct.B = type <{ i32, i16, i16 }> diff --git a/test/CodeGen/ARM/call-tc.ll b/test/CodeGen/ARM/call-tc.ll index d4636021b59..40694bfca5c 100644 --- a/test/CodeGen/ARM/call-tc.ll +++ b/test/CodeGen/ARM/call-tc.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -mtriple=armv6-apple-ios -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKV6 -; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF -; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D +; RUN: llc < %s -mtriple=armv6-apple-ios5.0 -mattr=+vfp2 | FileCheck %s -check-prefix=CHECKV6 ; RUN: llc < %s -mtriple=thumbv7-apple-ios5.0 | FileCheck %s -check-prefix=CHECKT2D +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 \ +; RUN: | FileCheck %s -check-prefix=CHECKELF ; Enable tailcall optimization for iOS 5.0 ; rdar://9120031 diff --git a/test/CodeGen/ARM/fast-tail-call.ll b/test/CodeGen/ARM/fast-tail-call.ll index 9fbdc9d24b0..6472016c057 100644 --- a/test/CodeGen/ARM/fast-tail-call.ll +++ b/test/CodeGen/ARM/fast-tail-call.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=thumbv7-linux-gnueabi -O0 -arm-tail-calls < %s | FileCheck %s +; RUN: llc -mtriple=thumbv7-linux-gnueabi -O0 < %s | FileCheck %s ; Primarily a non-crash test: Thumbv7 Linux does not have FastISel support, ; which led (via a convoluted route) to DAG nodes after a TC_RETURN that diff --git a/test/CodeGen/ARM/returned-ext.ll b/test/CodeGen/ARM/returned-ext.ll index d2cdeb096a8..925e9e729f4 100644 --- a/test/CodeGen/ARM/returned-ext.ll +++ b/test/CodeGen/ARM/returned-ext.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=armv6-linux-gnueabi -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF -; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D +; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-ios5.0 | FileCheck %s -check-prefix=CHECKT2D declare i16 @identity16(i16 returned %x) declare i32 @identity32(i32 returned %x) diff --git a/test/CodeGen/ARM/returned-trunc-tail-calls.ll b/test/CodeGen/ARM/returned-trunc-tail-calls.ll index 59467271a7a..6051a83dceb 100644 --- a/test/CodeGen/ARM/returned-trunc-tail-calls.ll +++ b/test/CodeGen/ARM/returned-trunc-tail-calls.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv7 -arm-tail-calls | FileCheck %s +; RUN: llc < %s -mtriple=armv7 | FileCheck %s declare i16 @ret16(i16 returned) declare i32 @ret32(i32 returned) diff --git a/test/CodeGen/ARM/this-return.ll b/test/CodeGen/ARM/this-return.ll index cb42de69f0a..c681a1c8095 100644 --- a/test/CodeGen/ARM/this-return.ll +++ b/test/CodeGen/ARM/this-return.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=armv6-linux-gnueabi -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF -; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D +; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-ios5.0 | FileCheck %s -check-prefix=CHECKT2D %struct.A = type { i8 } %struct.B = type { i32 }