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Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode and remove disassmbler table emitter hack.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198544 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2014-01-05 04:32:42 +00:00
parent 527f132627
commit 2b5dc93948
2 changed files with 4 additions and 5 deletions
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5
lib/Target/X86/X86InstrArithmetic.td
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@ -497,7 +497,8 @@ def DEC64_32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
Requires<[In64BitMode]>;
} // isConvertibleToThreeAddress = 1, CodeSize = 2
let isCodeGenOnly = 1, CodeSize = 2 in {
let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0,
CodeSize = 2 in {
def INC32_16r : I<0xFF, MRM0r, (outs GR16:$dst), (ins GR16:$src1),
"inc{w}\t$dst", [], IIC_UNARY_REG>,
OpSize, Requires<[Not64BitMode]>;
@ -510,7 +511,7 @@ def DEC32_16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
def DEC32_32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
"dec{l}\t$dst", [], IIC_UNARY_REG>,
Requires<[Not64BitMode]>;
} // isCodeGenOnly = 1, CodeSize = 2
} // isCodeGenOnly = 1, ForceDisassemble = 1, HasSideEffects = 0, CodeSize = 2
} // Constraints = "$src1 = $dst", SchedRW

4
utils/TableGen/X86RecognizableInstr.cpp
View File

@ -483,9 +483,7 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
assert(Rec->isSubClassOf("X86Inst") && "Can only filter X86 instructions");
if (Form == X86Local::Pseudo ||
(IsCodeGenOnly && !ForceDisassemble &&
Name.find("INC32") == Name.npos && Name.find("DEC32") == Name.npos))
if (Form == X86Local::Pseudo || (IsCodeGenOnly && !ForceDisassemble))
return FILTER_STRONG;