diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll index 5dffb803493..30975225c3e 100644 --- a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll +++ b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv6-elf +; RUN: llc < %s -mtriple=arm-linux-gnueabi ; PR4528 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll index 3fa48c9ba09..d666f12b86a 100644 --- a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll +++ b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv6-elf +; RUN: llc < %s -mtriple=arm-linux-gnueabi ; PR4528 define i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize { diff --git a/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll b/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll index 5199526d469..4b4101556f1 100644 --- a/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll +++ b/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm +; RUN: llc < %s -mtriple=arm-linux-gnueabi ; PR4528 ; Inline asm is allowed to contain operands "=&r", "0". diff --git a/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll index 4c4f19c0f4f..299364773f6 100644 --- a/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll +++ b/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm +; RUN: llc < %s -mtriple=arm-linux-gnueabi ; PR4716 define void @_start() nounwind naked {