Simplify a few more uses of reg_iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82812 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-09-25 22:26:13 +00:00
parent 29438d13e0
commit 2bf0649e05
3 changed files with 8 additions and 12 deletions

View File

@ -1087,11 +1087,9 @@ LiveIntervals::isProfitableToCoalesce(LiveInterval &DstInt, LiveInterval &SrcInt
SmallVector<MachineInstr*,16> &OtherCopies) {
bool HaveConflict = false;
unsigned NumIdent = 0;
for (MachineRegisterInfo::reg_iterator ri = mri_->reg_begin(SrcInt.reg),
re = mri_->reg_end(); ri != re; ++ri) {
for (MachineRegisterInfo::def_iterator ri = mri_->def_begin(SrcInt.reg),
re = mri_->def_end(); ri != re; ++ri) {
MachineOperand &O = ri.getOperand();
if (!O.isDef())
continue;
MachineInstr *MI = &*ri;
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;