Revert "Refactor UpdatePredRedefs and StepForward to avoid duplication. NFC"

This reverts commit 963cdbccf6e5578822836fd9b2ebece0ba9a60b7 (ie r236514)

This is to get the bots green while i investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236518 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pete Cooper
2015-05-05 18:49:08 +00:00
parent 5ffc7bfc9a
commit 2c04d158ce
3 changed files with 32 additions and 35 deletions

View File

@ -975,18 +975,26 @@ void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
/// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
/// values defined in MI which are not live/used by MI.
static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
Redefs.stepForward(*MI, Clobbers);
for (ConstMIBundleOperands Ops(MI); Ops.isValid(); ++Ops) {
if (!Ops->isReg() || !Ops->isKill())
continue;
unsigned Reg = Ops->getReg();
if (Reg == 0)
continue;
Redefs.removeReg(Reg);
}
for (MIBundleOperands Ops(MI); Ops.isValid(); ++Ops) {
if (!Ops->isReg() || !Ops->isDef())
continue;
unsigned Reg = Ops->getReg();
if (Reg == 0 || Redefs.contains(Reg))
continue;
Redefs.addReg(Reg);
// Now add the implicit uses for each of the clobbered values.
for (auto Reg : Clobbers) {
const MachineOperand &Op = *Reg.second;
// FIXME: Const cast here is nasty, but better than making StepForward
// take a mutable instruction instead of const.
MachineInstr *OpMI = const_cast<MachineInstr*>(Op.getParent());
MachineInstrBuilder MIB(*OpMI->getParent()->getParent(), OpMI);
assert(Op.isReg() && "Register operand required");
MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
MachineOperand &Op = *Ops;
MachineInstr *MI = Op.getParent();
MachineInstrBuilder MIB(*MI->getParent()->getParent(), MI);
MIB.addReg(Reg, RegState::Implicit | RegState::Undef);
}
}
@ -1366,8 +1374,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
for (MachineBasicBlock::const_iterator I = BBI1->BB->begin(), E = DI1; I != E;
++I) {
SmallVector<std::pair<unsigned, const MachineOperand*>, 4> IgnoredClobbers;
Redefs.stepForward(*I, IgnoredClobbers);
Redefs.stepForward(*I);
}
BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
BBI2->BB->erase(BBI2->BB->begin(), DI2);