6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-09 13:33:17 +00:00
Code Issues Projects Releases Wiki Activity

Enable DeadMachineInstructionElim when Fast-ISel is enabled.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56604 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-09-25 01:14:49 +00:00
parent 723ac3720f
commit 2c4bf119be
3 changed files with 19 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
include/llvm/Target/TargetOptions.h
View File

@ -101,6 +101,12 @@ namespace llvm {
/// DisableJumpTables - This flag indicates jump tables should not be /// DisableJumpTables - This flag indicates jump tables should not be
/// generated. /// generated.
extern bool DisableJumpTables; extern bool DisableJumpTables;
/// FastISel - This flag enables fast-path instruction selection
/// which trades away generated code quality in favor of reducing
/// compile time.
extern bool EnableFastISel;
} // End llvm namespace } // End llvm namespace
#endif #endif

13
lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -25,6 +25,10 @@
#include "llvm/Support/raw_ostream.h" #include "llvm/Support/raw_ostream.h"
using namespace llvm; using namespace llvm;
namespace llvm {
bool EnableFastISel;
}
static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden, static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
cl::desc("Print LLVM IR produced by the loop-reduce pass")); cl::desc("Print LLVM IR produced by the loop-reduce pass"));
static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden, static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
@ -49,6 +53,11 @@ DisablePostRAScheduler("disable-post-RA-scheduler",
cl::desc("Disable scheduling after register allocation"), cl::desc("Disable scheduling after register allocation"),
cl::init(true)); cl::init(true));
static cl::opt<bool, true>
FastISelOption("fast-isel", cl::Hidden,
cl::desc("Enable the experimental \"fast\" instruction selector"),
cl::location(EnableFastISel));
FileModel::Model FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
raw_ostream &Out, raw_ostream &Out,
@ -168,6 +177,10 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
if (PrintMachineCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr)); PM.add(createMachineFunctionPrinterPass(cerr));
// If we're using Fast-ISel, clean up the mess.
if (EnableFastISel)
PM.add(createDeadMachineInstructionElimPass());
if (EnableLICM) if (EnableLICM)
PM.add(createMachineLICMPass()); PM.add(createMachineLICMPass());

3
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -56,9 +56,6 @@ EnableValueProp("enable-value-prop", cl::Hidden);
static cl::opt<bool> static cl::opt<bool>
EnableLegalizeTypes("enable-legalize-types", cl::Hidden); EnableLegalizeTypes("enable-legalize-types", cl::Hidden);
static cl::opt<bool> static cl::opt<bool>
EnableFastISel("fast-isel", cl::Hidden,
cl::desc("Enable the experimental \"fast\" instruction selector"));
static cl::opt<bool>
EnableFastISelVerbose("fast-isel-verbose", cl::Hidden, EnableFastISelVerbose("fast-isel-verbose", cl::Hidden,
cl::desc("Enable verbose messages in the experimental \"fast\" " cl::desc("Enable verbose messages in the experimental \"fast\" "
"instruction selector")); "instruction selector"));