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Function for handling byval arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144447 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -35,8 +35,9 @@ def RetCC_MipsO32 : CallingConv<[
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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def CC_MipsN : CallingConv<[
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def CC_MipsN : CallingConv<[
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// FIXME: Handle byval, complex and float double parameters.
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// Handles byval parameters.
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CCIfByVal<CCCustom<"CC_Mips64Byval">>,
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// Promote i8/i16/i32 arguments to i64.
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// Promote i8/i16/i32 arguments to i64.
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CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
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CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
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@ -1772,8 +1772,6 @@ SDValue MipsTargetLowering::LowerATOMIC_FENCE(SDValue Op,
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// Calling Convention Implementation
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// Calling Convention Implementation
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#include "MipsGenCallingConv.inc"
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// TODO: Implement a generic logic using tblgen that can support this.
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// TODO: Implement a generic logic using tblgen that can support this.
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// Mips O32 ABI rules:
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// Mips O32 ABI rules:
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@ -1880,6 +1878,46 @@ static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
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return false; // CC must always match
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return false; // CC must always match
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}
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}
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static const unsigned Mips64IntRegs[8] =
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{Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
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Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
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static const unsigned Mips64DPRegs[8] =
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{Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64,
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Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64};
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static bool CC_Mips64Byval(unsigned ValNo, MVT ValVT, MVT LocVT,
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CCValAssign::LocInfo LocInfo,
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ISD::ArgFlagsTy ArgFlags, CCState &State) {
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unsigned Align = std::max(ArgFlags.getByValAlign(), (unsigned)8);
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unsigned Size = (ArgFlags.getByValSize() + 7) / 8 * 8;
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unsigned FirstIdx = State.getFirstUnallocated(Mips64IntRegs, 8);
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assert(Align <= 16 && "Cannot handle alignments larger than 16.");
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// If byval is 16-byte aligned, the first arg register must be even.
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if ((Align == 16) && (FirstIdx % 2)) {
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State.AllocateReg(Mips64IntRegs[FirstIdx], Mips64DPRegs[FirstIdx]);
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++FirstIdx;
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}
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// Mark the registers allocated.
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for (unsigned I = FirstIdx; Size && (I < 8); Size -= 8, ++I)
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State.AllocateReg(Mips64IntRegs[I], Mips64DPRegs[I]);
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// Allocate space on caller's stack.
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unsigned Offset = State.AllocateStack(Size, Align);
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if (FirstIdx < 8)
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State.addLoc(CCValAssign::getReg(ValNo, ValVT, Mips64IntRegs[FirstIdx],
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LocVT, LocInfo));
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else
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State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
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return true;
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}
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#include "MipsGenCallingConv.inc"
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Call Calling Convention Implementation
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// Call Calling Convention Implementation
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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