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InstrItineraryData is already on the subtarget, no reason to
cache it on the target as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211818 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -67,15 +67,12 @@ SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler",
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HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM,
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CodeModel::Model CM,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL)
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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DL("e-m:e-p:32:32-i1:32-i64:64-a:0-n32") ,
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Subtarget(TT, CPU, FS), InstrInfo(Subtarget), TLInfo(*this),
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TSInfo(*this),
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FrameLowering(Subtarget),
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InstrItins(&Subtarget.getInstrItineraryData()) {
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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DL("e-m:e-p:32:32-i1:32-i64:64-a:0-n32"), Subtarget(TT, CPU, FS),
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InstrInfo(Subtarget), TLInfo(*this), TSInfo(*this),
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FrameLowering(Subtarget) {
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initAsmInfo();
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}
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@ -33,7 +33,6 @@ class HexagonTargetMachine : public LLVMTargetMachine {
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HexagonTargetLowering TLInfo;
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HexagonSelectionDAGInfo TSInfo;
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HexagonFrameLowering FrameLowering;
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const InstrItineraryData* InstrItins;
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public:
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HexagonTargetMachine(const Target &T, StringRef TT,StringRef CPU,
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@ -52,7 +51,7 @@ public:
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}
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const InstrItineraryData* getInstrItineraryData() const override {
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return InstrItins;
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return &getSubtargetImpl()->getInstrItineraryData();
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}
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