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Fix last night's PPC32 regressions by

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1. Not selecting the false value of a select_cc in the false arm, which
   isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
   Expander.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman 2005-08-14 18:38:32 +00:00
parent 889f2c1acf
commit 2d56e72f09
2 changed files with 2 additions and 3 deletions
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1
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -1625,6 +1625,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
False = DAG.getNode(ISD::XOR, NVT, False,
DAG.getConstant(1ULL << ShiftAmt, NVT));
Result = LegalizeOp(DAG.getNode(ISD::SELECT, NVT, Tmp3, True, False));
return Result;
} else {
assert(0 && "Do not know how to expand FP_TO_SINT yet!");
}

4
lib/Target/PowerPC/PPCISelPattern.cpp
View File

@ -2162,9 +2162,8 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
// If the False value only has one use, we can generate better code by
// selecting it in the fallthrough basic block rather than here, which
// increases register pressure.
bool FalseHasOneUse = N.getOperand(3).Val->hasOneUse();
unsigned TrueValue = SelectExpr(N.getOperand(2));
unsigned FalseValue = FalseHasOneUse ? 0 : SelectExpr(N.getOperand(3));
unsigned FalseValue = SelectExpr(N.getOperand(3));
unsigned CCReg = SelectCC(N.getOperand(0), N.getOperand(1), CC);
Opc = getBCCForSetCC(CC);
@ -2195,7 +2194,6 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
// %FalseValue = ...
// # fallthrough to sinkMBB
BB = copy0MBB;
if (FalseHasOneUse) FalseValue = SelectExpr(N.getOperand(3));
// Update machine-CFG edges
BB->addSuccessor(sinkMBB);