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Add TTA-based Co-design Environment to external OS projects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142954 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -298,23 +298,22 @@ object-oriented programming, operator overloading and strong typing.</p>
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<!--
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<h3>TTA-based Co-design Environment (TCE)</h3>
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<h3>TTA-based Codesign Environment (TCE)</h3>
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<div>
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<div>
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<p>TCE is a toolset for designing application-specific processors (ASP) based on
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<p>TCE is a toolset for designing application-specific processors (ASP) based on
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the Transport triggered architecture (TTA). The toolset provides a complete
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the Transport triggered architecture (TTA). The toolset provides a complete
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co-design flow from C/C++ programs down to synthesizable VHDL and parallel
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co-design flow from C/C++ programs down to synthesizable VHDL and parallel
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program binaries. Processor customization points include the register files,
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program binaries. Processor customization points include the register files,
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function units, supported operations, and the interconnection network.</p>
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function units, supported operations, and the interconnection network.</p>
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<p>TCE uses Clang and LLVM for C/C++ language support, target independent
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<p>TCE uses Clang and LLVM for C/C++ language support, target independent
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optimizations and also for parts of code generation. It generates new LLVM-based
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optimizations and also for parts of code generation. It generates new
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code generators "on the fly" for the designed TTA processors and loads them in
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LLVM-based code generators <i>on the fly</i> for the designed TTA processors
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to the compiler backend as runtime libraries to avoid per-target recompilation
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and loads them in to the compiler backend as runtime libraries to avoid
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of larger parts of the compiler chain.</p>
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per-target recompilation of larger parts of the compiler chain.</p>
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</div>
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</div>
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-->
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