From 2db8628085e92dc76852a922ab50bd3b76a5824f Mon Sep 17 00:00:00 2001 From: Richard Trieu Date: Sat, 10 Sep 2011 01:26:21 +0000 Subject: [PATCH] Fixed an assert from: assert("not implemented for target shuffle node"); to: assert(0 && "not implemented for target shuffle node"); This causes a test failure in CodeGen/X86/palignr.ll which has been marked as XFAIL for the time being. Test failure filed at PR10901. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139454 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 2 +- test/CodeGen/X86/palignr.ll | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0d658492e5d..577f57acded 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4616,7 +4616,7 @@ static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG, ShuffleMask); break; default: - assert("not implemented for target shuffle node"); + assert(0 && "not implemented for target shuffle node"); return SDValue(); } diff --git a/test/CodeGen/X86/palignr.ll b/test/CodeGen/X86/palignr.ll index 6875fb33924..8a50eea4b28 100644 --- a/test/CodeGen/X86/palignr.ll +++ b/test/CodeGen/X86/palignr.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mcpu=core2 -mattr=+ssse3 | FileCheck %s ; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck --check-prefix=YONAH %s +; XFAIL: * define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind { ; CHECK: test1: