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Stub for constant shift expr support.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10168 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke
2003-11-22 05:18:35 +00:00
parent 0415b6c57a
commit 2dd3e1b435
2 changed files with 46 additions and 0 deletions
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23
lib/Target/X86/X86ISelSimple.cpp
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@@ -224,6 +224,13 @@ namespace {
MachineBasicBlock::iterator &IP,
Value *Op0, Value *Op1, unsigned Opcode,
unsigned TargetReg);
/// emitShiftOperation - Common code shared between visitShiftInst and
/// constant expression support.
void emitShiftOperation(MachineBasicBlock *BB,
MachineBasicBlock::iterator &IP,
Value *Op0, Value *Op1, unsigned Opcode,
unsigned TargetReg);
/// copyConstantToRegister - Output the instructions required to put the
@@ -384,6 +391,12 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
CE->getOpcode(), R);
return;
case Instruction::Shl:
case Instruction::Shr:
emitShiftOperation(MBB, IP, CE->getOperand(0), CE->getOperand(1),
CE->getOpcode(), R);
break;
default:
std::cerr << "Offending expr: " << C << "\n";
assert(0 && "Constant expression not yet handled!\n");
@@ -1568,6 +1581,16 @@ void ISel::visitShiftInst(ShiftInst &I) {
}
}
/// emitShiftOperation - Common code shared between visitShiftInst and
/// constant expression support.
void ISel::emitShiftOperation(MachineBasicBlock *MBB,
MachineBasicBlock::iterator &IP,
Value *Op0, Value *Op1, unsigned Opcode,
unsigned TargetReg) {
// FIXME: Should do all the stuff from visitShiftInst, but use BMI
assert (0 && "Constant shift operations not yet handled");
}
/// visitLoadInst - Implement LLVM load instructions in terms of the x86 'mov'
/// instruction. The load and store instructions are the only place where we