From 2ebb4f81f7979838bc5eb00ef997d30b00442a02 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Tue, 15 Jun 2010 19:04:29 +0000 Subject: [PATCH] Remove the arm_aapcscc marker from the tests. It is the default for the linux targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106029 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll | 6 +++--- test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll | 6 +++--- .../ARM/2009-08-15-RegScavenger-EarlyClobber.ll | 2 +- test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll | 6 +++--- test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll | 2 +- test/CodeGen/ARM/2009-10-27-double-align.ll | 6 +++--- test/CodeGen/ARM/arm-frameaddr.ll | 2 +- test/CodeGen/ARM/armv4.ll | 2 +- test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll | 6 +++--- test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll | 10 +++++----- test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll | 2 +- test/Transforms/ScalarRepl/memcpy-align.ll | 2 +- 12 files changed, 26 insertions(+), 26 deletions(-) diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll index 65ffed2b80a..5dffb803493 100644 --- a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll +++ b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll @@ -4,7 +4,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" target triple = "armv6-elf" -define arm_aapcscc i32 @file_read_actor(i32* nocapture %desc, i32* %page, i32 %offset, i32 %size) nounwind optsize { +define i32 @file_read_actor(i32* nocapture %desc, i32* %page, i32 %offset, i32 %size) nounwind optsize { entry: br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i @@ -26,8 +26,8 @@ bb2: ; preds = %fault_in_pages_writeable.exit unreachable bb3: ; preds = %fault_in_pages_writeable.exit - %1 = tail call arm_aapcscc i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; [#uses=0] + %1 = tail call i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; [#uses=0] unreachable } -declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32) +declare i32 @__copy_to_user(i8*, i8*, i32) diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll index 9e5372a7935..3fa48c9ba09 100644 --- a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll +++ b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=armv6-elf ; PR4528 -define arm_aapcscc i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize { +define i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize { entry: br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i @@ -18,8 +18,8 @@ bb2: ; preds = %fault_in_pages_writeable.exit unreachable bb3: ; preds = %fault_in_pages_writeable.exit - %2 = tail call arm_aapcscc i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; [#uses=0] + %2 = tail call i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; [#uses=0] unreachable } -declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32) +declare i32 @__copy_to_user(i8*, i8*, i32) diff --git a/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll b/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll index 18d68f79370..5199526d469 100644 --- a/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll +++ b/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll @@ -6,7 +6,7 @@ %struct.device_dma_parameters = type { i32, i32 } %struct.iovec = type { i8*, i32 } -define arm_aapcscc i32 @generic_segment_checks(%struct.iovec* nocapture %iov, i32* nocapture %nr_segs, i32* nocapture %count, i32 %access_flags) nounwind optsize { +define i32 @generic_segment_checks(%struct.iovec* nocapture %iov, i32* nocapture %nr_segs, i32* nocapture %count, i32 %access_flags) nounwind optsize { entry: br label %bb8 diff --git a/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll index a46482cc731..4c4f19c0f4f 100644 --- a/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll +++ b/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -march=arm ; PR4716 -define arm_aapcscc void @_start() nounwind naked { +define void @_start() nounwind naked { entry: - tail call arm_aapcscc void @exit(i32 undef) noreturn nounwind + tail call void @exit(i32 undef) noreturn nounwind unreachable } -declare arm_aapcscc void @exit(i32) noreturn nounwind +declare void @exit(i32) noreturn nounwind diff --git a/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll index 53bd6682595..4aa879dc409 100644 --- a/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll +++ b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll @@ -3,7 +3,7 @@ %0 = type { double, double } -define arm_aapcscc void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind { +define void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind { ; CHECK: foo: ; CHECK: bl __adddf3 ; CHECK-NOT: strd diff --git a/test/CodeGen/ARM/2009-10-27-double-align.ll b/test/CodeGen/ARM/2009-10-27-double-align.ll index f17d059ed08..c31b116c55b 100644 --- a/test/CodeGen/ARM/2009-10-27-double-align.ll +++ b/test/CodeGen/ARM/2009-10-27-double-align.ll @@ -2,13 +2,13 @@ @.str = private constant [1 x i8] zeroinitializer, align 1 -define arm_aapcscc void @g() { +define void @g() { entry: ;CHECK: [sp, #8] ;CHECK: [sp, #12] ;CHECK: [sp] - tail call arm_aapcscc void (i8*, ...)* @f(i8* getelementptr ([1 x i8]* @.str, i32 0, i32 0), i32 1, double 2.000000e+00, i32 3, double 4.000000e+00) + tail call void (i8*, ...)* @f(i8* getelementptr ([1 x i8]* @.str, i32 0, i32 0), i32 1, double 2.000000e+00, i32 3, double 4.000000e+00) ret void } -declare arm_aapcscc void @f(i8*, ...) +declare void @f(i8*, ...) diff --git a/test/CodeGen/ARM/arm-frameaddr.ll b/test/CodeGen/ARM/arm-frameaddr.ll index 1c7ac25e073..2cf1422c66a 100644 --- a/test/CodeGen/ARM/arm-frameaddr.ll +++ b/test/CodeGen/ARM/arm-frameaddr.ll @@ -3,7 +3,7 @@ ; PR4344 ; PR4416 -define arm_aapcscc i8* @t() nounwind { +define i8* @t() nounwind { entry: ; DARWIN: t: ; DARWIN: mov r0, r7 diff --git a/test/CodeGen/ARM/armv4.ll b/test/CodeGen/ARM/armv4.ll index 49b129dabd3..ef722de01d2 100644 --- a/test/CodeGen/ARM/armv4.ll +++ b/test/CodeGen/ARM/armv4.ll @@ -5,7 +5,7 @@ ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=ARM ; RUN: llc < %s -mtriple=armv4t-unknown-eabi | FileCheck %s -check-prefix=THUMB -define arm_aapcscc i32 @test(i32 %a) nounwind readnone { +define i32 @test(i32 %a) nounwind readnone { entry: ; ARM: mov pc ; THUMB: bx diff --git a/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll b/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll index ebe9d469f22..acff2615cbb 100644 --- a/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll +++ b/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll @@ -5,7 +5,7 @@ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } @.str2 = external constant [30 x i8], align 1 ; <[30 x i8]*> [#uses=1] -define arm_aapcscc i32 @__mf_heuristic_check(i32 %ptr, i32 %ptr_high) nounwind { +define i32 @__mf_heuristic_check(i32 %ptr, i32 %ptr_high) nounwind { entry: br i1 undef, label %bb1, label %bb @@ -17,7 +17,7 @@ bb1: ; preds = %entry bb2: ; preds = %bb1 %0 = call i8* @llvm.frameaddress(i32 0) ; [#uses=1] - %1 = call arm_aapcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* noalias undef, i8* noalias getelementptr ([30 x i8]* @.str2, i32 0, i32 0), i8* %0, i8* null) nounwind ; [#uses=0] + %1 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* noalias undef, i8* noalias getelementptr ([30 x i8]* @.str2, i32 0, i32 0), i8* %0, i8* null) nounwind ; [#uses=0] unreachable bb9: ; preds = %bb1 @@ -26,4 +26,4 @@ bb9: ; preds = %bb1 declare i8* @llvm.frameaddress(i32) nounwind readnone -declare arm_aapcscc i32 @fprintf(%struct.FILE* noalias nocapture, i8* noalias nocapture, ...) nounwind +declare i32 @fprintf(%struct.FILE* noalias nocapture, i8* noalias nocapture, ...) nounwind diff --git a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll index 40775358a94..f26c6d114b8 100644 --- a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll +++ b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll @@ -2,12 +2,12 @@ ; PR4659 ; PR4682 -define hidden arm_aapcscc i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind { +define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind { entry: ; CHECK: __gcov_execlp: ; CHECK: mov sp, r7 ; CHECK: sub sp, #4 - call arm_aapcscc void @__gcov_flush() nounwind + call void @__gcov_flush() nounwind br i1 undef, label %bb5, label %bb bb: ; preds = %bb, %entry @@ -15,10 +15,10 @@ bb: ; preds = %bb, %entry bb5: ; preds = %bb, %entry %0 = alloca i8*, i32 undef, align 4 ; [#uses=1] - %1 = call arm_aapcscc i32 @execvp(i8* %path, i8** %0) nounwind ; [#uses=1] + %1 = call i32 @execvp(i8* %path, i8** %0) nounwind ; [#uses=1] ret i32 %1 } -declare hidden arm_aapcscc void @__gcov_flush() +declare hidden void @__gcov_flush() -declare arm_aapcscc i32 @execvp(i8*, i8**) nounwind +declare i32 @execvp(i8*, i8**) nounwind diff --git a/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll index a0f99187a4a..e3c23ac025f 100644 --- a/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll +++ b/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll @@ -3,7 +3,7 @@ @g_d = external global double ; [#uses=1] -define arm_aapcscc void @foo(float %yIncr) { +define void @foo(float %yIncr) { entry: br i1 undef, label %bb, label %bb4 diff --git a/test/Transforms/ScalarRepl/memcpy-align.ll b/test/Transforms/ScalarRepl/memcpy-align.ll index 91d354d31a3..a7af208f4f3 100644 --- a/test/Transforms/ScalarRepl/memcpy-align.ll +++ b/test/Transforms/ScalarRepl/memcpy-align.ll @@ -9,7 +9,7 @@ target triple = "arm-u-u" @c = external global %0 ; <%0*> [#uses=1] -define arm_aapcscc void @good() nounwind { +define void @good() nounwind { entry: %x0 = alloca %struct.anon, align 4 ; <%struct.anon*> [#uses=2] %tmp = bitcast %struct.anon* %x0 to i8* ; [#uses=1]