6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-23 16:19:52 +00:00
Code Issues Projects Releases Wiki Activity

Reapply r52988, "Simplify addRegisterKilled and addRegisterDead." The

Browse Source 
254.gap failure was not due to this mod.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53068 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-07-03 01:18:51 +00:00
parent 08c09496c2
commit 2ebc11ac6d
1 changed files with 18 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
lib/CodeGen/MachineInstr.cpp
View File

@@ -738,7 +738,7 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
const TargetRegisterInfo *RegInfo, const TargetRegisterInfo *RegInfo,
bool AddIfNotFound) { bool AddIfNotFound) {
bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
bool Found = false; bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
SmallVector<unsigned,4> DeadOps; SmallVector<unsigned,4> DeadOps;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MachineOperand &MO = getOperand(i); MachineOperand &MO = getOperand(i);
@@ -749,15 +749,15 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
continue; continue;
if (Reg == IncomingReg) { if (Reg == IncomingReg) {
if (!Found) // One kill of reg per instruction.
MO.setIsKill(); MO.setIsKill();
Found = true; return true;
} else if (isPhysReg && MO.isKill() && }
if (hasAliases && MO.isKill() &&
TargetRegisterInfo::isPhysicalRegister(Reg)) { TargetRegisterInfo::isPhysicalRegister(Reg)) {
// A super-register kill already exists. // A super-register kill already exists.
if (RegInfo->isSuperRegister(IncomingReg, Reg)) if (RegInfo->isSuperRegister(IncomingReg, Reg))
Found = true; return true;
else if (RegInfo->isSubRegister(IncomingReg, Reg)) if (RegInfo->isSubRegister(IncomingReg, Reg))
DeadOps.push_back(i); DeadOps.push_back(i);
} }
} }
@@ -774,14 +774,14 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
// If not found, this means an alias of one of the operands is killed. Add a // If not found, this means an alias of one of the operands is killed. Add a
// new implicit operand if required. // new implicit operand if required.
if (!Found && AddIfNotFound) { if (AddIfNotFound) {
addOperand(MachineOperand::CreateReg(IncomingReg, addOperand(MachineOperand::CreateReg(IncomingReg,
false /*IsDef*/, false /*IsDef*/,
true /*IsImp*/, true /*IsImp*/,
true /*IsKill*/)); true /*IsKill*/));
return true; return true;
} }
return Found; return false;
} }
bool MachineInstr::addRegisterDead(unsigned IncomingReg, bool MachineInstr::addRegisterDead(unsigned IncomingReg,
@@ -789,7 +789,6 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
bool AddIfNotFound) { bool AddIfNotFound) {
bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
bool Found = false;
SmallVector<unsigned,4> DeadOps; SmallVector<unsigned,4> DeadOps;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
MachineOperand &MO = getOperand(i); MachineOperand &MO = getOperand(i);
@@ -798,13 +797,14 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
if (Reg == IncomingReg) { if (Reg == IncomingReg) {
MO.setIsDead(); MO.setIsDead();
Found = true; return true;
} else if (hasAliases && MO.isDead() && }
if (hasAliases && MO.isDead() &&
TargetRegisterInfo::isPhysicalRegister(Reg)) { TargetRegisterInfo::isPhysicalRegister(Reg)) {
// There exists a super-register that's marked dead. // There exists a super-register that's marked dead.
if (RegInfo->isSuperRegister(IncomingReg, Reg)) if (RegInfo->isSuperRegister(IncomingReg, Reg))
Found = true; return true;
else if (RegInfo->isSubRegister(IncomingReg, Reg)) if (RegInfo->isSubRegister(IncomingReg, Reg))
DeadOps.push_back(i); DeadOps.push_back(i);
} }
} }
@@ -821,13 +821,13 @@ bool MachineInstr::addRegisterDead(unsigned IncomingReg,
// If not found, this means an alias of one of the operand is dead. Add a // If not found, this means an alias of one of the operand is dead. Add a
// new implicit operand. // new implicit operand.
if (!Found && AddIfNotFound) { if (AddIfNotFound) {
addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/, addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/,
true/*IsImp*/,false/*IsKill*/, true/*IsImp*/,false/*IsKill*/,
true/*IsDead*/)); true/*IsDead*/));
return true; return true;
} }
return Found; return false;
} }
/// copyKillDeadInfo - copies killed/dead information from one instr to another /// copyKillDeadInfo - copies killed/dead information from one instr to another