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trim down the target info structs now that we have a preferred spill register class for each callee save register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23560 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -36,8 +36,6 @@ class TargetRegisterClass;
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struct MRegisterDesc {
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struct MRegisterDesc {
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const char *Name; // Assembly language name for the register
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const char *Name; // Assembly language name for the register
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const unsigned *AliasSet; // Register Alias Set, described above
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const unsigned *AliasSet; // Register Alias Set, described above
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unsigned char SpillSize; // Size of this register in bytes
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unsigned char SpillAlignment; // Alignment of stack slot for this reg
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};
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};
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class TargetRegisterClass {
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class TargetRegisterClass {
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@ -189,18 +187,6 @@ public:
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return get(RegNo).Name;
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return get(RegNo).Name;
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}
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}
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/// getSpillSize - Return the size in bits required of a stack slot used to
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/// spill register into.
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unsigned getSpillSize(unsigned RegNo) const {
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return get(RegNo).SpillSize;
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}
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/// getSpillAlignment - Return the alignment required by a stack slot used to
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/// spill register into.
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unsigned getSpillAlignment(unsigned RegNo) const {
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return get(RegNo).SpillAlignment;
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}
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/// getNumRegs - Return the number of registers this target has
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/// getNumRegs - Return the number of registers this target has
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/// (useful for sizing arrays holding per register information)
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/// (useful for sizing arrays holding per register information)
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unsigned getNumRegs() const {
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unsigned getNumRegs() const {
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@ -214,24 +214,9 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
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OS << Reg.getName();
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OS << Reg.getName();
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OS << "\",\t";
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OS << "\",\t";
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if (RegisterAliases.count(Reg.TheDef))
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if (RegisterAliases.count(Reg.TheDef))
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OS << Reg.getName() << "_AliasSet,\t";
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OS << Reg.getName() << "_AliasSet },\n";
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else
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else
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OS << "Empty_AliasSet,\t";
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OS << "Empty_AliasSet },\n";
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// Figure out what the size and alignment of the spill slots are for this
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// reg. This may be explicitly declared in the register, or it may be
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// inferred from the register classes it is part of.
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std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E;
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tie(I, E) = RegClassesBelongedTo.equal_range(Reg.TheDef);
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unsigned SpillSize = Reg.DeclaredSpillSize;
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unsigned SpillAlign = Reg.DeclaredSpillAlignment;
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for (; I != E; ++I) { // For each reg class this belongs to.
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const CodeGenRegisterClass *RC = I->second;
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SpillSize = std::max(SpillSize, RC->SpillSize);
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SpillAlign = std::max(SpillAlign, RC->SpillAlignment);
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}
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OS << SpillSize << ", " << SpillAlign << " },\n";
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}
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}
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OS << " };\n"; // End of register descriptors...
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OS << " };\n"; // End of register descriptors...
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OS << "}\n\n"; // End of anonymous namespace...
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OS << "}\n\n"; // End of anonymous namespace...
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