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Remove working entry from README.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129654 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7,14 +7,6 @@ copy (3-addr bswap + memory support?) This is available on Atom processors.
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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CodeGen/X86/lea-3.ll:test3 should be a single LEA, not a shift/move. The X86
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backend knows how to three-addressify this shift, but it appears the register
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allocator isn't even asking it to do so in this case. We should investigate
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why this isn't happening, it could have significant impact on other important
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cases for X86 as well.
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//===---------------------------------------------------------------------===//
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This should be one DIV/IDIV instruction, not a libcall:
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This should be one DIV/IDIV instruction, not a libcall:
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unsigned test(unsigned long long X, unsigned Y) {
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unsigned test(unsigned long long X, unsigned Y) {
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@ -14,7 +14,7 @@ define i32 @test(i32 %a) {
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ret i32 %tmp2
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ret i32 %tmp2
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}
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}
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;; TODO! LEA instead of shift + copy.
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; CHECK: leaq (,[[A0]],8), %rax
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define i64 @test3(i64 %a) {
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define i64 @test3(i64 %a) {
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%tmp2 = shl i64 %a, 3
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%tmp2 = shl i64 %a, 3
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ret i64 %tmp2
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ret i64 %tmp2
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