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R600/SI: Avoid generating S_MOVs with 64-bit immediates v2

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SITargetLowering::analyzeImmediate() was converting the 64-bit values
to 32-bit and then checking if they were an inline immediate.  Some
of these conversions caused this check to succeed and produced
S_MOV instructions with 64-bit immediates, which are illegal.

v2:
  - Clean up logic

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178927 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2013-04-05 23:31:20 +00:00
parent ff56d1a201
commit 2fc7443498
2 changed files with 31 additions and 2 deletions
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7
lib/Target/R600/SIISelLowering.cpp
View File

@ -424,9 +424,12 @@ int32_t SITargetLowering::analyzeImmediate(const SDNode *N) const {
float F;
} Imm;
if (const ConstantSDNode *Node = dyn_cast<ConstantSDNode>(N))
if (const ConstantSDNode *Node = dyn_cast<ConstantSDNode>(N)) {
if (Node->getZExtValue() >> 32) {
return -1;
}
Imm.I = Node->getSExtValue();
else if (const ConstantFPSDNode *Node = dyn_cast<ConstantFPSDNode>(N))
} else if (const ConstantFPSDNode *Node = dyn_cast<ConstantFPSDNode>(N))
Imm.F = Node->getValueAPF().convertToFloat();
else
return -1; // It isn't an immediate

26
test/CodeGen/R600/imm.ll Normal file
View File

@ -0,0 +1,26 @@
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
; XXX: Enable once SI supports buffer stores
; XFAIL: *
; Use a 64-bit value with lo bits that can be represented as an inline constant
; CHECK: @i64_imm_inline_lo
; CHECK: S_MOV_B32 [[LO:SGPR[0-9]+]], 5
; CHECK: V_MOV_B32_e32 [[LO_VGPR:VGPR[0-9]+]], [[LO]]
; CHECK: BUFFER_STORE_DWORDX2 [[LO_VGPR]]_
define void @i64_imm_inline_lo(i64 addrspace(1) *%out) {
entry:
store i64 1311768464867721221, i64 addrspace(1) *%out ; 0x1234567800000005
ret void
}
; Use a 64-bit value with hi bits that can be represented as an inline constant
; CHECK: @i64_imm_inline_hi
; CHECK: S_MOV_B32 [[HI:SGPR[0-9]+]], 5
; CHECK: V_MOV_B32_e32 [[HI_VGPR:VGPR[0-9]+]], [[HI]]
; CHECK: BUFFER_STORE_DWORDX2 {{VGPR[0-9]+}}_[[HI_VGPR]]
define void @i64_imm_inline_hi(i64 addrspace(1) *%out) {
entry:
store i64 21780256376, i64 addrspace(1) *%out ; 0x0000000512345678
ret void
}