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name change: hasPattern() -> getMachineCombinerPatterns() ; NFC

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This was suggested as part of D10460, but it's independent of
any functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
2015-06-19 23:21:42 +00:00
parent 152f3b5997
commit 30c3b2a4c2
6 changed files with 40 additions and 42 deletions
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12
include/llvm/Target/TargetInstrInfo.h
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@@ -724,16 +724,16 @@ public:
/// order since the pattern evaluator stops checking as soon as it finds a
/// faster sequence.
/// \param Root - Instruction that could be combined with one of its operands
/// \param Pattern - Vector of possible combination pattern
virtual bool hasPattern(
/// \param Patterns - Vector of possible combination patterns
virtual bool getMachineCombinerPatterns(
MachineInstr &Root,
SmallVectorImpl<MachineCombinerPattern::MC_PATTERN> &Pattern) const {
return false;
}
/// When hasPattern() finds a pattern this function generates the instructions
/// that could replace the original code sequence. The client has to decide
/// whether the actual replacement is beneficial or not.
/// When getMachineCombinerPatterns() finds patterns, this function generates
/// the instructions that could replace the original code sequence. The client
/// has to decide whether the actual replacement is beneficial or not.
/// \param Root - Instruction that could be combined with one of its operands
/// \param P - Combination pattern for Root
/// \param InsInstrs - Vector of new instructions that implement P
@@ -742,7 +742,7 @@ public:
/// \param InstrIdxForVirtReg - map of virtual register to instruction in
/// InsInstr that defines it
virtual void genAlternativeCodeSequence(
MachineInstr &Root, MachineCombinerPattern::MC_PATTERN P,
MachineInstr &Root, MachineCombinerPattern::MC_PATTERN Pattern,
SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs,
DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const {