6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-29 10:25:12 +00:00
Code Issues Projects Releases Wiki Activity

Fix physical register liveness calculations:

Browse Source 
+ Take account of clobbers
+ Give outputs priority over inputs since they happen later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168360 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover
2012-11-20 09:56:11 +00:00
parent 4fe5405bdd
commit 310f248c22
4 changed files with 34 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
lib/CodeGen/MachineInstrBundle.cpp
View File

@@ -281,7 +281,7 @@ MachineOperandIteratorBase::PhysRegInfo
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
PhysRegInfo PRI = {false, false, false, false, false, false, false};
PhysRegInfo PRI = {false, false, false, false, false, false};
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
@@ -305,7 +305,9 @@ MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
// Reg or a super-reg is read, and perhaps killed also.
PRI.Reads = true;
PRI.Kills = MO.isKill();
} if (IsRegOrOverlapping && MO.readsReg()) {
}
if (IsRegOrOverlapping && MO.readsReg()) {
PRI.ReadsOverlap = true;// Reg or an overlapping register is read.
}